F81867
PECI Address Register ⎯ Offset 0Bh
Bit
Name
R/W Reset
Default
Description
Select the Intel CPU socket number.
0000: no CPU presented. PECI host will use Ping () command to
find the CPU address.
0001: CPU is in socket 0, i.e. PECI address is 0x30.
0010: CPU is in socket 0, i.e. PECI address is 0x31.
0100: CPU is in socket 0, i.e. PECI address is 0x32.
1000: CPU is in socket 0, i.e. PECI address is 0x33.
7-4
CPU_SEL
R/W
5VSB
0
Others are reserved.
Reserved.
3-1
0
Reserved
-
-
0
0
If the CPU is selected as dual core. Set this register 1 to read the
temperature of domain1.
DOMAIN1_EN
R/W
5VSB
TCC TEMP Register ⎯ Offset 0Ch
Bit
Name
R/W Reset Default
Description
TCC Activation Temperature.
When PECI is enabled, the absolute value of CPU temperature is
calculated by the equation:
7-0
TCC_TEMP
R/W 5VSB
8’h55
CPU_TEMP = TCC_TEMP + PECI Reading.
The range of this register is -128 ~ 127.
TSI_OFFSET Register ⎯ Offset 0Dh
Bit
Name
R/W Reset Default
Description
This byte is used as the offset to be added to the CPU
7-0
TSI_OFFSET
R/W 5VSB
8’h00
temperature reading of AMD_TSI.
The range of this register is -128 ~ 127.
Configuration Register 4 ⎯ Offset 0Fh
Bit
Name
R/W Reset Default
Description
Reserved.
7-5
Reserved
-
R/W
-
-
0
1
0
0
-
5
Reserved
Reserved
Dummy Register
-
4-2
Reserved.
5VSB
1-0 DIG_RATE_SEL R/W
Reserved for Fintek use only
219
Dec, 2011
V0.12P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
