M12L16161A
Write Interrupted by Precharge Command & Write Burst stop Cycle @ Burst Length =Full page
0
1
9
11
2
3
6
10
12
17
5
7
8
13
15
16
19
4
14
18
C L O C K
H I G H
C K E
C S
R A S
CA S
A D D R
RA a
CA b
CA a
BA
A1 0 /A P
RA a
B D L
tR D L
t
*N o t e 2
DAa 2
DA a4
DAb 0 DAb 1 DAb2 DAb3 DA b4
D Ab5
DA a0
DA a3
D Q
DAa1
W E
D Q M
W r it e
( A - Ba n k )
Bu r s t St o p
W r i t e
( A - Ba n k )
Ro w A c t i ve
( A- B a n k )
Pr e c h a r g e
( A - B an k )
:D o n ' t C a r e
1. Burst can’t end in full page mode, so auto precharge can’t issue.
*Note:
2.Data-in at the cycle of interrupted by precharge can not be written into the corresponding memory cell. It is defined
by AC parameter of RDL.
t
DQM at write interrupted by precharge command is needed to prevent invalid write.
Input data after Row precharge cycle will be masked internally.
3.Burst stop is valid at every burst length.
:
Publication Da te J an. 2000
Elite Semiconductor Memory Technology Inc.
P.22
:
Revis ion 1.3u
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
