M12L16161A
Mode Register Set Cycle
Auto Refresh Cycle
1
2
3
4
5
6
0
1
2
3
4
5
6
7
8
9
1 0
0
C L O C K
C K E
H IG H
H IG H
C S
* N o t e 2
t R F C
R A S
* N o t e 1
* N o t e 3
C A S
Key
R a
A D D R
DQ
W E
H i- Z
H i - Z
D Q M
MR S
N e w C o m m a n d
A u t o R e f r e s h
N e w C o m m a n d
: D o n ' t C a r e
*Both banks precharge should be completed before Mode Register Set cycle and auto refresh cycle.
MODE REGISTER SET CYCLE
*Note: 1. CS , RAS , CAS & WE activation at the same clock cycle with address key will set internal mode register.
2.Minimum 2 clock cycles should be met before new RAS activation.
3.Please refer to Mode Register Set table.
:
Publication Da te J an. 2000
Elite Semiconductor Memory Technology Inc.
P.26
:
Revis ion 1.3u
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
