DM9016
3-port switch with Processor Interface
6.23 Transmit Check Sum Control Register (31H)
Bit
7~3
2
1
0
Name
RESERVED
UDPCSE
TCPCSE
IPCSE
Default
0,RO
HP0,RW
HP0,RW
HP0,RW
Description
Reserved
UDP Checksum Generation Enable
TCP Checksum Generation Enable
IP Checksum Generation Enable
6.24 Receive Check Sum Control Status Register (32H)
Bit
Name
Default
Description
7
UDPS
HP0,RO
UDP Checksum Status
1: if UDP packet checksum fail
TCP Checksum Status
1: if TCP packet checksum fail
IP Checksum Status
6
5
TCPS
IPS
HP0,RO
HP0,RO
1: if IP packet checksum fail
4
3
2
1
UDPP
TCPP
IPP
HP0,RO
HP0,RO
HP0,RO
This is a UDP Packet
This is a TCP Packet
This is a IP Packet
RCSEN
HPS0,RW Receive Checksum Checking Enable
When set, the checksum status will store in packet first byte of status header.
HPS0,RW Discard Checksum Error Packet
When set, if IP/TCP/UDP checksum field is error, this packet will be discarded.
6.25 General Purpose Control Register 2 (34H)
0
DCSE
Bit
Name
Default
Description
7~0
GPC2
HP0,RW General Purpose Control 2
Define the input/output direction of pins SD23~16, which are used as general
purpose pins when none 32-bit mode and external MII mode, respectively.
6.26 General Purpose Register 2 (35H)
Bit
Name
Default
Description
7~0
GPD2
HP0,RW General Purpose Register 2 Data
When the correspondent bit of General Purpose Control Register 2 is set, the value
of the bit is reflected to pin SD23~16
When the correspondent bit of General Purpose Control Register 2 is 0, the value
of the bit to be read is reflected from correspondent pins SD23~16
6.27 General Purpose Control Register 3 (36H)
Bit
Name
Default
Description
7~0
GPC3
HP0,RW General Purpose Control 3
Define the input/output direction of pins SD31~24, which are used as general
purpose pins when none 32-bit mode and external MII mode, respectively.
6.28 General Purpose Register 3 (37H)
Bit
Name
Default
Description
7~0
GPD3
HP0,RW General Purpose Register 3 Data
When the correspondent bit of General Purpose Control Register 3 is set, the value
of the bit is reflected to pin SD31~24
When the correspondent bit of General Purpose Control Register 3 is 0, the value
of the bit to be read is reflected from correspondent pins SD31~24
Preliminarydatasheet
DM9016-13-DS-P01
March 26, 2009
27
DAVICOM [ DAVICOM SEMICONDUCTOR, INC. ]
