DM9016
3-port switch with Processor Interface
6.33 TX Block Size Control Register (3FH)
Bit
Name
Default
Description
7:6
Reserved
PS0,RO
Reserved
TX Block Size in 2-Port Mode
This value defines the transmit block size in 256-byte unit.
TX memory size = TX_SIZE * 256 bytes
And then
5:0
TX_SIZE
P20h,RW
RX memory size = 16KB – (TX_SIZE + 1)*256-Byte
Note: The value of TX_SIZE should be between 14H and 30H
6.34 Monitor Register 1 (40H)
Bit
7
6
5
4
Name
BWIDTH
DWIDTH
IRQOC
Default
T0,RO
T0,RO
Description
8-bit Data Strap Latch Status
32-bit Data Strap Latch Status
ET0,RO IRQ Open-Collect Pin Status
ET0,RO IRQ Polarity Pin Status
IRQP
3:0
RESERVED
0,RO
Reserved
6.35 Monitor Register 2 (41H)
Bit
7
6
5
4
3
2
1
0
Name
TEST3
TEST2
TEST1
MDC
EECS
EECK
EEDO
EEDI
Default
RO
RO
Description
Description
Description
TEST3 pin
TEST2 pin
TEST1 pin
MDC Strap Status
EECS Strap Status
EECK Strap Status
EEDO Strap Status
EEDI Strap Status
RO
T0,RO
T0,RO
T0,RO
T0,RO
T0,RO
6.36 Monitor Register 3 (42H)
Bit
7:4
4
3
2
Name
RESERVED
TXE2
TXD2_3
TXD2_2
TXD2_1
TXD2_0
Default
0,RO
T0,RO
T0,RO
T0,RO
T0,RO
T0,RO
Reserved
TXE2 Strap Status
TXD2_3 Strap Status
TXD2_2 Strap Status
TXD2_1 Strap Status
TXD2_0 Strap Status
1
0
6.37 Monitor Register 4 (43H)
Bit
7
6:0
Name
RESERVED
GPIO
Default
0,RO
T0,RO
Reserved
GPIO 0~6 Strap Status
Preliminarydatasheet
DM9016-13-DS-P01
March 26, 2009
29
DAVICOM [ DAVICOM SEMICONDUCTOR, INC. ]
