DM9016
3-port switch with Processor Interface
6.14 General Purpose Control Register (1EH)
Bit
7
6:0
Name
RESERVED
GPC
Default
0,RO
Description
Reserved
PH,0,RW General Purpose Control 6~0
Define the input/output direction of pins GP6~0 respectively. 1: output, 0:input
6.15 General Purpose Register (1FH)
Bit
7
6:0
Name
RESERVED
GEPIO
Default
0,RO
X,RW
Description
Reserved
General Purpose Data 6~0
These bits are reflect to pin GP6~0 respectively.
6.16 RX Packet Length Low Register ( 20H )
Bit
7:0
Name
RXPLL
Default
PH,RO
Description
Description
Description
RX Packet Length Low Byte
6.17 RX Packet Length High Register ( 21H )
Bit
7:0
Name
RXPLH
Default
PH,RO
RX Packet Length High Byte
6.18 RX Additional Status Register ( 26H )
Bit
7:4
1:0
Name
RESERVED
Default
0,RO
Reserved
uP Received Pointer Status
Only available when RX pointer restriction is enabled ( Reg27h.7=0).
RPTRS
PH,RO
00: Within buffer
01: End of buffer
1x: Exceed buffer
6.19 RX Additional Control Register ( 27H )
Bit
7
6:0
Name
RPRD
RESERVED
Default
Description
Description
PHS0,RW RX Pointer Restriction Disable
0,RO
Reserved
6.20 Vendor ID Register (28H~29H)
Bit
7:0
7:0
Name
VIDH
VIDL
Default
PE,0AH,RO
PE,46H.RO
Vendor ID High Byte (29H)
Vendor ID Low Byte (28H)
6.21 Product ID Register (2AH~2BH)
Bit
7:0
7:0
Name
PIDH
PIDL
Default
PE,90H,RO
PE,16H.RO
Description
Description
Product ID High Byte (2BH)
Product ID Low Byte (2AH)
6.22 Chip Revision Register (2CH)
Bit
Name
Default
7:0
CHIPR
P02H,RO
CHIP Revision
26
Preliminary datasheet
DM9016-13-DS-P01
March 26, 2009
DAVICOM [ DAVICOM SEMICONDUCTOR, INC. ]
