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DM9016 参数 Datasheet PDF下载

DM9016图片预览
型号: DM9016
PDF下载: 下载PDF文件 查看货源
内容描述: 10/100 Mbps的3端口以太网交换机控制器与通用处理器接口 [10/100 Mbps 3-port Ethernet Switch Controller with General Processor Interface]
分类和应用: 控制器以太网局域网(LAN)标准
文件页数/大小: 85 页 / 508 K
品牌: DAVICOM [ DAVICOM SEMICONDUCTOR, INC. ]
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DM9016  
3-port switch with Processor Interface  
6.9 EEPROM & PHY Address Register (0CH)  
Bit  
7:6  
5:0  
Name  
PHY_ADR PH01,RW PHY Address bit 1 and 0; the PHY address bit [4:2] is force to 0.  
EROA PH0,RW EEPROM Word Address or PHY Register Address  
Default  
Description  
6.10 EPROM & PHY Data Register (0DH~0EH)  
Bit  
Name  
Default  
Description  
7:0  
EE_PHY_L  
PH0,RW EEPROM or PHY Low Byte Data (0DH)  
This data is made to write low byte of word address defined in Reg. CH to  
EEPROM or PHY  
7:0  
EE_PHY_H  
PH0,RW EEPROM or PHY High Byte Data (0EH)  
This data is made to write high byte of word address defined in Reg. CH to  
EEPROM or PHY  
6.11 Wake Up Control Register (0FH)  
Bit  
7:6  
5
Name  
RESERVED  
LINKEN  
Type  
0,RO  
Description  
Reserved  
PHE0,RW Link Change Event Enable  
When set, it enables Link Status Change Wake up Event  
4
3
RESERVED  
MAGICEN  
0,RO  
Reserved  
PHE0,RW Magic Packet Event Enable  
When set, it enables Magic Packet Wake up Event  
PH0,RO Link Change Event Status  
When set, it indicates that Link Status Change Event (link of port 0 or 1) occurred  
2
LINKST  
This bit can be cleared by write 1 to bit 5 of NSR or write 0 to bit 6 of NCR.  
1
0
RESERVED  
MAGICST  
0,RO  
Reserved  
PH0,RO Magic Packet Event Status  
When set, indicates the Magic Packet is received and Magic packet Event  
occurred. This bit can be cleared by write 1 to bit 5 of NSR or write 0 to bit 6 of  
NCR.  
6.12 Physical Address Register (10H~15H)  
Bit  
7:0  
7:0  
7:0  
7:0  
7:0  
7:0  
Name  
PAB5  
PAB4  
PAB3  
PAB2  
PAB1  
PAB0  
Default  
E,RW  
E,RW  
E,RW  
E,RW  
E,RW  
E,RW  
Description  
Physical Address Byte 5 (15H)  
Physical Address Byte 4 (14H)  
Physical Address Byte 3 (13H)  
Physical Address Byte 2 (12H)  
Physical Address Byte 1 (11H)  
Physical Address Byte 0 (10H)  
6.13 Multicast Address Register (16H~1DH)  
Bit  
7:0  
7:0  
7:0  
7:0  
7:0  
7:0  
7:0  
7:0  
Name  
MAB7  
MAB6  
MAB5  
MAB4  
MAB3  
MAB2  
MAB1  
MAB0  
Default  
X,RW  
X,RW  
X,RW  
X,RW  
X,RW  
X,RW  
X,RW  
X,RW  
Description  
Multicast Address Byte 7 (1DH)  
Multicast Address Byte 6 (1CH)  
Multicast Address Byte 5 (1BH)  
Multicast Address Byte 4 (1AH)  
Multicast Address Byte 3 (19H)  
Multicast Address Byte 2 (18H)  
Multicast Address Byte 1 (17H)  
Multicast Address Byte 0 (16H)  
Preliminarydatasheet  
DM9016-13-DS-P01  
March 26, 2009  
25  
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