AIS Baseband Processor
CMX910
ADC_Control1 register: 8-bit write only.
C-BUS Address $65
All bits cleared to 0 on reset.
7
6
5
4
3
2
1
0
Bit:
Reserved, set Auto
to 00
En
En
En
En
En
Conv. ADC4 ADC3 ADC2 ADC1 ADC0
ADC_Control1 register b5: ADC Auto Convert
Setting b5 = 1 causes the ADC to continuously convert the enabled channels in ascending order.
While in auto convert mode, the channel enable bits (ADC_Control1 b4-0) can be changed at any
time, and will update the ADC conversion scheduler immediately. Auto convert is terminated by
setting b5 = 0.
ADC_Control1 register b4-0: Enable ADC4-0
Writing a 1 to these bits selects the corresponding ADC channels for conversion.
ADC_Control2 register: 8-bit write only.
C-BUS Address $66
All bits cleared to 0 on reset.
7
6
5
4
3
2
1
0
Bit:
En Op En Op En Op
Amp2 Amp1 Amp0
Reserved, set to 00000
ADC_Control2 register b2-0: Enable Op Amp 2-0
The three uncommitted op-amps are independently controllable using these bits: setting a bit to 1
enables the uncommitted op-amp in the corresponding ADC channel; setting the bit to 0 powers
down the corresponding op-amp and puts its output into a high impedance state. When an op-
amp is powered down, its “output” pin (AUXADC2FB, AUXADC1FB, and AUXADC0FB) may be
used as an input to the ADC.
ADC_Status register: 8-bit read only.
C-BUS Address $67
Reset state is $01.
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
Bit:
ADC
Ready
ADC_Status register b0: ADC Ready
This bit goes low when a single-shot conversion is started using the ADC_Convert command, and
remains low until conversions on all enabled ADC channels have completed. This bit can be
polled by the µC to find out when the conversion sequence has completed; it is also connected to
the interrupt generator block. This bit does not go low when auto convert mode is enabled, or if an
ADC_Convert command is issued while auto convert mode is enabled.
ADC_Convert command (no data)
C-BUS Address $68
Issuing this C-BUS command causes a single-shot conversion to be initiated in which a single conversion
is done on each of the enabled ADC channels in ascending order. This command is ignored if it is issued
while the ADC is in auto convert mode.
© 2009 CML Microsystems Plc
41
D/910/6
CMLMICRO [ CML MICROCIRCUITS ]
