AIS Baseband Processor
CMX910
CSTDMA_Threshold register: 16-bit write only.
C-BUS Address $26
All bits cleared to 0 on reset.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Bit:
CSTDMA signal strength threshold
The value in the CSTDMA_threshold register is used when attempting a transmission with
CSTDMA enabled. At the beginning of the slot in which data is to be transmitted, typically just
before the PA is ramped up, the received signal strength in the selected CSTDMA channel (Rx1
or Rx2) is measured. If this exceeds the value in the CSTDMA_threshold register, the
transmission is aborted and a TxDone interrupt is generated. Otherwise, transmission proceeds
normally. Note: the value written to the CSTDMA_Threshold register must be between 0 and
32767 ($7FFF).
The received signal strength is calculated by accumulating the I/Q vector magnitudes at each
sample point (i.e. every 20.833µs) between the CSTDMA_START and CSTDMA_END points, as
defined in the Tx Event Sequence table (see section 5.5.5). Before being added to the running
total, each vector magnitude is multiplied by a fixed gain of 0.4117 and a user-programmable gain
“CSTDMA_gain” of between 0 and 1 (this is set up using a special command function, see section
5.12). In the case of overflow, the accumulated signal strength value saturates at 32767 ($7FFF).
The total accumulated signal strength value is given by:
CSTDMA _ END
2
2
⎛
⎜
⎞
⎟
CSTDMA _ signal _ strength =
In + Qn × 0.4117 × CSTDMA _ gain
∑
⎝
⎠
n=CSTDMA _ START +1
For the purpose of calculating the CSTDMA signal strength, the signed 16-bit I and Q vector
values are taken directly from the output of the selected channel’s Σ-Δ ADCs, prior to passing
through the channel filters. With a DC voltage of ±1.7V (differential) applied to the input of the I or
Q ADC, the corresponding I or Q ADC output will be approximately ±15000.
© 2009 CML Microsystems Plc
23
D/910/6
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