ATmega169P
24.5.5
Scanning the ADC
Figure 24-9 shows a block diagram of the ADC with all relevant control and observe signals. The
Boundary-scan cell from Figure 24-5 is attached to each of these signals. The ADC need not be
used for pure connectivity testing, since all analog inputs are shared with a digital port pin as
well.
Figure 24-9. Analog to Digital Converter
VCCREN
AREF
IREFEN
1.11V
ref
To Comparator
PASSEN
MUXEN_7
ADC_7
MUXEN_6
ADC_6
MUXEN_5
ADC_5
MUXEN_4
ADC_4
ADCBGEN
SCTEST
1.22V
ref
EXTCH
MUXEN_3
ADC_3
PRECH
PRECH
AREF
AREF
DACOUT
COMP
MUXEN_2
ADC_2
MUXEN_1
ADC_1
MUXEN_0
ADC_0
DAC_9..0
ADCEN
10-bit DAC
+
-
COMP
ACTEN
+
NEGSEL_2
NEGSEL_1
NEGSEL_0
1x
-
HOLD
ADC_2
ADC_1
GNDEN
ST
ACLK
AMPEN
ADC_0
The signals are described briefly in Table 24-5.
267
8018A–AVR–03/06
ATMEL [ ATMEL ]
