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AM79C978KC/W 参数 Datasheet PDF下载

AM79C978KC/W图片预览
型号: AM79C978KC/W
PDF下载: 下载PDF文件 查看货源
内容描述: 单芯片1/10 Mbps的PCI家庭网络控制器 [Single-Chip 1/10 Mbps PCI Home Networking Controller]
分类和应用: 控制器PC
文件页数/大小: 261 页 / 3499 K
品牌: AMD [ AMD ]
 浏览型号AM79C978KC/W的Datasheet PDF文件第84页浏览型号AM79C978KC/W的Datasheet PDF文件第85页浏览型号AM79C978KC/W的Datasheet PDF文件第86页浏览型号AM79C978KC/W的Datasheet PDF文件第87页浏览型号AM79C978KC/W的Datasheet PDF文件第89页浏览型号AM79C978KC/W的Datasheet PDF文件第90页浏览型号AM79C978KC/W的Datasheet PDF文件第91页浏览型号AM79C978KC/W的Datasheet PDF文件第92页  
Magic Packet  
MPPEN  
PG  
MPMAT  
SET  
CLR  
S
R
Q
Q
MPMODE  
MPEN  
POR  
MPDETECT  
Link Change  
LCDET  
LCMODE  
SET  
S
R
Q
Q
SET  
CLR  
S
R
Q
Q
Link Change  
CLR  
POR  
H_RESET  
PME_STATUS  
DET  
CLR  
S
R
Q
Q
Pattern Match  
POR  
PMAT  
BCR47  
BCR46  
BCR45  
SET  
CLR  
S
R
Q
Q
Input  
Pattern  
Pattern Match RAM (PMR)  
POR  
PME Status  
PME_EN  
MPMAT  
PME  
PME_EN_OVR  
LCEVENT  
22206B-50  
Figure 46. OnNow Functional Diagram  
Link Change Detect  
coming packets, depending on the pattern length and  
the way the PMR is programmed. When a pattern  
match has been detected, then PMAT bit (CSR116, bit  
7) is set. The setting of the PMAT bit causes the  
PME_STATUS bit (PMCSR, bit 15) to be set, which in  
turn will assert the PME pin if the PME_EN bit  
(PMCSR, bit 8) is set.  
Link change detect is one of wake-up events defined  
by the OnNow specification. Link Change Detect mode  
is set when the LCMODE bit (CSR116, bit 8) is set ei-  
ther by software or loaded through the EEPROM.  
When this bit is set, any change in the Link status will  
cause the LCDET bit (CSR116, bit 9) to be set. When  
the LCDET bit is set, the PME_STATUS bit (PMCSR  
register, bit 15) will be set. If either the PME_EN bit  
(PMCSR, bit 8) or the PME_EN_OVR bit (CSR116, bit  
10) are set, then the PME will also be asserted.  
Pattern Match RAM (PMR)  
PMR is organized as an array of 64 words by 40 bits as  
shown in Figure 47. The PMR is programmed indirectly  
through BCRs 45, 46, and 47. When BCR45 is written  
and the PMAT_MODE bit (BCR45, bit 7) is set to 1,  
Pattern Match logic is enabled. No bus accesses into  
the PMR are possible when the PMAT_MODE bit is  
set, and BCR46, BCR47, and all other bits in BCR45  
are ignored. When PMAT_MODE is set, a read of  
BCR45 returns all bits undefined except for  
OnNow Pattern Match Mode  
In the OnNow Pattern Match Mode, the Am79C978 de-  
vice compares the incoming packets with up to eight  
patterns stored in the Pattern Match RAM (PMR). The  
stored patterns can be compared with part or all of in-  
88  
Am79C978  
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