Table 16. EEPROM Map
Byte
Word
Byte
Address
Addr.
Most Significant Byte
Addr.
Least Significant Byte
First byte of the IS0 8802-3 (IEEE/ANSI 802.3)
station physical address for this node, where
“first byte” refers to the first byte to appear on
the 802.3 medium
2nd byte of the ISO 8802-3 (IEEE/ANSI
802.3) station physical address for this node
00h*
01h
00h
01h
02h
03h
03h
05h
07h
4th byte of the node address
6th byte of the node address
CSR116[15:8] (OnNow Misc. Configuration)
Hardware ID: must be 11h if compatibility to
AMD drivers is desired
02h
04h
06h
3rd byte of the node address
5th byte of the node address
CSR116[7:0] (OnNow Misc. Configuration)
04h
05h
06h
09h
0Bh
0Dh
08h
0Ah
0Ch
Reserved location: must be 00h
User programmable space
User programmable space
MSB of two-byte checksum, which is the sum
of bytes 00h-0Bh and bytes 0Eh and 0Fh
Must be ASCII “W” (57h) if compatibility to
AMD driver software is desired
LSB of two-byte checksum, which is the sum
of bytes 00h-0Bh and bytes 0Eh and 0Fh
Must be ASCII “W” (57h) if compatibility to
AMD driver software is desired
07h
0Fh
0Eh
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
20h
21h
22h
23h
24h
25h
26h
27h
11h
13h
15h
17h
19h
1Bh
1Dh
1Fh
21h
23h
25h
27h
29h
2Bh
2Dh
2Fh
31h
33h
35h
37h
39h
3Bh
3Dh
3Fh
41h
43h
45h
47h
49h
4Bh
4Dh
4Fh
BCR2[15:8] (Miscellaneous Configuration)
BCR4[15:8] (Link Status LED)
BCR5[15:8] (LED1 Status)
BCR6[15:8] (LED2 Status)
BCR7[15:8] (LED3 Status)
BCR9[15:8] (Full-Duplex control)
BCR18[15:8] (Burst and Bus Control)
BCR22[15:8] (PCI Latency)
BCR23[15:8] (PCI Subsystem Vendor ID)
BCR24[15:8] (PCI Subsystem ID)
BCR25[15:8] (SRAM Size)
10h
12h
14h
16h
18h
1Ah
1Ch
1Eh
20h
22h
24h
26h
28h
2Ah
2Ch
2Eh
30h
32h
34h
36h
38h
3Ah
3Ch
3Eh
40h
42h
44h
46h
48h
4Ah
4Ch
4Eh
BCR2[7:0] (Miscellaneous Configuration)
BCR4[7:0] (Link Status LED)
BCR5[7:0] (LED1 Status)
BCR6[7:0] (LED2 Status)
BCR7[7:0] (LED3 Status)
BCR9[7:0] (Full-Duplex Control)
BCR18[7:0] (Burst and Bus Control)
BCR22[7:0] (PCI Latency)
BCR23[7:0] (PCI Subsystem Vendor ID)
BCR24[7:0] (PCI Subsystem ID)
BCR25[7:0] (SRAM Size)
BCR26[15:8] (SRAM Boundary)
BCR26[7:0] (SRAM Boundary)
BCR27[15:8] (SRAM Interface Control)
BCR32[15:8] (MII Control and Status)
BCR33[15:8] (MII Address)
BCR27[7:0] (SRAM Interface Control)
BCR32[7:0] (MII Control and Status)
BCR33[7:0] (MII Address)
BCR35[15:8] (PCI Vendor ID)
BCR35[7:0] (PCI Vendor ID)
BCR36[15:8] (Conf. Space. byte 43h alias)
BCR37[15:8] (DATA_SCALE alias 0)
BCR38[15:8] (DATA_SCALE alias 1)
BCR39[15:8] (DATA_SCALE alias 2)
BCR40[15:8] (DATA_SCALE alias 3)
BCR41[15:8] (DATA_SCALE alias 4)
BCR42[15:8] (DATA_SCALE alias 0)
BCR43[15:8] (DATA_SCALE alias 0)
BCR44[15:8] (DATA_SCALE alias 0)
BCR48[15:8] (LED4 Status)
BCR36[7:0] (Conf. Space byte 42h alias)
BCR37[7:0] (Conf. Space byte 47h0alias)
BCR38[7:0] (Conf. Space byte 47h1alias)
BCR39[7:0] (Conf. Space byte 47h2alias)
BCR40[7:0] (Conf. Space byte 47h3alias)
BCR41[7:0] (Conf. Space byte 47h4alias)
BCR42[7:0] (Conf. Space byte 47h5alias)
BCR43[7:0] (Conf. Space byte 47h6alias)
BCR44[7:0] (Conf. Space byte 47h7alias)
BCR48[7:0] (LED4 Status)
BCR49[15:8] (PHY Select)
BCR49[7:0] (PHY Select)
BCR50[15:8]Reserved location: must be 00h
BCR51[15:8]Reserved location: must be 00h
BCR52[15:8]Reserved location: must be 00h
BCR53[15:8]Reserved location: must be 00h
BCR54[15:8]Reserved location: must be 00h
Checksum adjust byte for the 82 bytes of the
EEPROM contents, checksum ofthe82bytes
of the EEPROM should total to FFh
BCR50[7:0]Reserved location: must be 00h
BCR51[7:0]Reserved location: must be 00h
BCR52[7:0]Reserved location: must be 00h
BCR53[7:0]Reserved location: must be 00h
BCR54[7:0]Reserved location: must be 00h
28h
51h
50h
BCR54[7:0]Reserved location: must be 00h
Empty locations – Ignored by device
3Eh
3Fh
7Dh
7Fh
Reserved
Reserved
7Ch
7Eh
Reserved
Reserved
Note: *Lowest EEPROM address.
86
Am79C978
AMD [ AMD ]
