High-Speed Differential I/O with DPA Support
Table 2–29. Supported TDO/TDI Voltage Combinations (Part 2 of 2)
Arria GX TDO VCCIO Voltage Level in I/O Bank 4
VCCIO = 3.3 V VCCI O = 2.5 V VCCIO = 1.8 V VCCI O = 1.5 V VCCIO = 1.2 V
TDI Input
Buffer Power
Device
VCC = 3.3 V
VCC = 2.5 V
VCC = 1.8 V
VCC = 1.5 V
Level shifter
required
Level shifter
required
v (1)
v (2)
v (2)
v (3)
v (3)
v
Level shifter
required
Level shifter
required
v (1), (4)
v (1), (4)
v (1), (4)
Non-
Arria GX
Level shifter
required
Level shifter
required
v (2), (5)
v (2), (5)
v (6)
v
v
Notes to Table 2–29:
(1) The TDOoutput buffer meets VOH (MIN) = 2.4 V.
(2) The TDOoutput buffer meets VOH (MIN) = 2.0 V.
(3) An external 250-Ωpull-up resistor is not required, but recommended if signal levels on the board
are not optimal.
(4) Input buffer must be 3.3-V tolerant.
(5) Input buffer must be 2.5-V tolerant.
(6) Input buffer must be 1.8-V tolerant.
Arria GX devices contain dedicated circuitry for supporting differential
standards at speeds up to 840 Mbps. LVDS differential I/O standards are
supported in the Arria GX device. In addition, the LVPECL I/O standard
is supported on input and output clock pins on the top and bottom I/O
banks.
High-Speed
Differential I/O
with DPA
Support
The high-speed differential I/O circuitry supports the following
high-speed I/O interconnect standards and applications:
■
■
■
SPI-4 Phase 2 (POS-PHY Level 4)
SFI-4
Parallel RapidIO standard
There are two dedicated high-speed PLLs (PLL1 and PLL2) in the
EP1AGX20 and EP1AGX35 devices and up to four dedicated high-speed
PLLs (PLL1, PLL2, PLL7, and PLL8) in the EP1AGX50, EP1AGX60, and
EP1AGX90 devices to multiply reference clocks and drive high-speed
differential SERDES channels in I/O banks 1 and 2.
Tables 2–30 through 2–34 show the number of channels that each fast PLL
can clock in each of the Arria GX devices. In Tables 2–30 through 2–34 the
first row for each transmitter or receiver provides the maximum number
of channels that each fast PLL can drive in its adjacent I/O bank (I/O
Bank 1 or I/O Bank 2). The second row shows the maximum number of
2–124
Altera Corporation
Arria GX Device Handbook, Volume 1
May 2008