HDMP-1022 (Tx), HDMP-1024 (Rx)
Control Frame Structure
M20SEL Not Asserted (16 bit mode)
D-Field
C-Field
D0 - D6
D0 - D6
D0 - D6
D7
0
D8
1
D9 - D15
D7 - D13
D7 - D13
C0
0
C1
0
C2
C3
1
1
0
1
0
1
1
0
HDMP-1022 (Tx), HDMP-1024 (Rx)
Control Frame Structure
M20SEL Asserted (20 bit mode)
D-Field
C-Field
D0 - D8
D0 - D8
D0 - D8
D9
0
D10
1
D11-D19
D9-D17
C0
0
C1
0
C2
1
C3
1
1
0
D9-D17
1
1
0
0
Fill Frame Codes
Two logical fill frames are
provided: FF0 and FF1. FF0 is
physically a 50% duty cycle wave
form with its sole rising edge
occurring between C1 and C2.
Logical FF1 toggles between two
different physical codes, the first
of which advances the falling edge
of FF0 by one bit, the second of
which retards the falling edge of
FF0 by one bit. Two logical fill
frame types are required for link
start up in duplex mode.
HDMP-1022 (Tx), HDMP-1024 (Rx)
Fill Frame Structure
M20SEL Not Asserted (16 bit mode)
Fill Frame
D-Field
10
C-Field
0011
0
1111111
1111111
1111111
0000000
0000000
0000000
1a
1b
11
0011
00
0011
HDMP-1022 (Tx), HDMP-1024 (Rx)
Fill Frame Structure
M20SEL Asserted (20 bit mode)
Fill Frame
D-Field
10
C-Field
0011
0
111111111
111111111
111111111
000000000
000000000
000000000
1a
1b
11
0011
00
0011
640