Data Sheet
AD5940
Bits
3
Bit Name
SEQSLPEN
Settings Description
Autosleep function by sequencer command.
Reset Access
0x0
0x0
0x1
R/W
R/W
R/W
0
1
Disables the sequencer autosleep function.
Enables the sequencer autosleep function.
2
TMRSLPEN
PWRMOD
Autosleep function by sleep and wake-up timer.
Disables the sleep and wake-up timer autosleep function.
Enables the sleep and wake-up timer autosleep function.
0
1
[1:0]
Power mode control bits. When read, these bits contain the last power mode value
entered by user code.
01 Active mode. Normal working mode. All digital circuits powered up. The user can
optionally power down blocks by disabling their input clock.
10 Hibernate mode. Digital core powered down. Most AFE die blocks powered down
(low power DACs and references can remain active to bias an external sensor). SRAM
is powered down, with or without retention. The high speed clock is powered down.
Only the low speed clock is powered up.
11 Reserved.
Key Protection for the PWRMOD Register—PWRKEY
Address 0x00000A04, Reset: 0x0000, Name: PWRKEY
Table 163. Bit Descriptions for PWRKEY Register
Bits
Bit Name Settings Description
Reset Access
0x0 R/W
[15:0] PWRKEY
PWRMOD key register. The PWRMOD register is key protected. Two writes to the key
are necessary to change the value in the PWRMOD register: first 0x4859, then 0xF27B.
Then, write to the PWRMOD register. A write to any other register before writing to
PWRMOD returns the protection to the lock state.
Low Power Mode AFE Control Lock Register—LPMODEKEY
Address 0x0000210C, Reset: 0x00000000, Name: LPMODEKEY
The LPMODEKEY register protects the LPMODECLKSEL and LPMODECON registers.
Table 164. Bit Descriptions for LPMODEKEY Register
Bits
[31:20] Reserved
[19:0] Key
Bit Name
Settings Description
Reset Access
Reserved.
0x0
0x0
R
R/W
These bits are the key for low power mode control by the sequencer related
registers. The key prevents accidental writing to the registers.
0xC59D6 Clocks related registers via a sequencer write.
0x00000 Locks the clock related registers via a sequencer write. Write any value other than
0xC59D6 to lock the sequencer read/write clock related registers.
Low Power Mode Clock Select Register—LPMODECLKSEL
Address 0x00002110, Reset: 0x00000000, Name: LPMODECLKSEL
The LPMODECLKSEL register is protected by the LPMODKEY register.
Table 165. Bit Descriptions for LPMODECLKSEL Register
Bits
[31:1] Reserved
LFSYSCLKEN
Bit Name
Settings Description
Reset Access
Reserved.
0x0
0x0
R
0
Enable for switching the system clock to 32 kHz via the sequencer. Write 1 to this
R/W
bit to switch to the 32 kHz oscillator. Clear this bit to switch to the 16 MHz oscillator.
Rev. 0 | Page 119 of 130
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