Data Sheet
AD5940
SYSTEM RESETS
The AD5940 provides the following reset sources:
The host microcontroller can trigger a software reset to the
AD5940 by clearing SWRSTCON, Bit 0. It is recommends to
connect the pin of the AD5940 to a GPIO pin on the
host processor to give the controller control over hardware
resets.
•
•
•
External reset.
POR.
Software reset of the digital part of the device. The low
power PA and low power TIA circuitry is not reset.
RESET
The AD5940 reset status register is RSTSTA. Read this register
to identify the source of the reset to the chip.
The AD5940 is reset during an external hardware reset or POR.
The external reset or hardware reset is connected to the external
Software resets can be bypassed to ensure the circuits used to
bias an external sensor are not disturbed. These circuits include
the ultra low power DACs, power amplifier, and TIAs. The
programmable switches circuits can also be configured to
maintain their states in the event of a reset.
RESET
pin. When this pin is pulled low, a reset occurs. All
circuits and control registers return to their default state.
ANALOG DIE RESET REGISTERS
Table 157. Analog Die Reset Registers Summary
Address
Name
Description
Reset
Access
W
R/W
0x00000A5C
0x00000424
0x00000A40
RSTCONKEY
SWRSTCON
RSTSTA
Key protection for SWRSTCON register.
Software reset register.
Reset status register.
0x0000
0x0001
0x0000
R/W1C
Key Protection for the RSTCON Register—RSTCONKEY
Address 0x00000A5C, Reset: 0x0000, Name: RSTCONKEY
Table 158. Bit Descriptions for RSTCONKEY Register
Bits
Bit Name
Settings
Description
Reset
Access
[15:0]
Key
Reset control key register. The SWRSTCON register is key protected with a value of 0x12EA.
Write to the SWRSTCON register after the key is entered. A write to any other register
before writing to the SWRSTCON register returns the protection to the lock state.
0x0
W
Software Reset Register—SWRSTCON
Address 0x00000424, Reset: 0x0001, Name: SWRSTCON
Table 159. Bit Descriptions for SWRSTCON Register
Bits
[15:1]
0
Bit Name
Reserved
SWRSTL
Settings
Description
Reserved.
Reset
0x0
0x1
Access
R
Software reset. Write to the RESTCONKEY register to unlock this register.
Not reset.
R/W
0
0xA158 Trigger reset.
Reset Status Register—RSTSTA
Address 0x00000A40, Reset: 0x0000, Name: RSTSTA
Table 160. Bit Descriptions for RSTSTA Register
Bits
Bit Name
Settings
Description
Reset
0x0
Access
[15:4] Reserved
Reserved.
R
3
MMRSWRST
MMR software reset. This bit is automatically set to 1 when writing to the SWRSTCON
register. Clear this bit by writing 1.
0x0
R/W1C
2
1
Reserved
EXTRST
Reserved.
0x0
0x0
R/W1C
R/W1C
External reset. This bit is automatically set to 1 when an external reset occurs. Clear this
bit by writing 1.
0
POR
AFE power-on reset. This bit is automatically set when a POR occurs. Clear this bit by
writing 1.
0x0
R/W1C
Rev. 0 | Page 117 of 130
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