Data Sheet
AD5940
Clock Gate Enable Register—CLKEN1
Address 0x00000410, Reset: 0x01C0, Name: CLKEN1
Table 172. Bit Descriptions for CLKEN1 Register
Bits
Bit Name
Settings Description
Reset Access
[15:10] Reserved
Reserved.
0x0
0x0
0x1
0x1
0x0
R
9
Reserved
Reserved
Reserved
ACLKDIS
Reserved. Never write to this bit. Leave this bit cleared to 0.
Reserved. Never write to this bit.
Reserved. Always leave at 0. Never write to these bits.
R/W
R/W
R/W
R/W
8
[7:6]
5
ACLK clock enable. This bit controls the main AFE control clock, including the analog
interface and digital signal processing.
1
0
Turn off ACLK clock.
Turn on ACLK clock.
4
3
2
1
0
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved. Always leave at 0. Never write to this bit.
Write 1 to this bit at initialization.
Reserved. Always leave at 0. Never write to this bit.
Reserved. Always leave at 0. Never write to this bit.
Write 1 to this bit at initialization.
0x0
0x0
0x0
0x0
0x0
R/W
R/W
R/W
R/W
R/W
Key Protection for the OSCCON Register—OSCKEY
Address 0x00000A0C, Reset: 0x0000, Name: OSCKEY
Table 173. Bit Descriptions for OSCKEY Register
Bits
Bit Name Settings Description
Reset Access
0x0 R/W
[15:0] OSCKEY
Oscillator control key register. The OSCCON register is key protected. OSCKEY must be
written to with a value of 0xCB14 before accessing the OSCCON register. A write to
any other register before writing to the OSCCON register returns the protection to the
lock state.
Oscillator Control Register—OSCCON
Address 0x00000A10, Reset: 0x0003, Name: OSCCON
The OSCCON register is key protected. To unlock this protection, write 0xCB14 to the OSCKEY register before writing to this register. A
write to any other register before writing to this register returns the protection to the lock state.
Table 174. Bit Descriptions for OSCCON Register
Bits
Bit Name
Settings Description
Reset Access
[15:11] Reserved
Reserved.
0x0
R
R
10
9
HFXTALOK
HFOSCOK
LFOSCOK
Reserved
Status of the high frequency crystal oscillator. This bit indicates when the oscillator is 0x0
stable after it is enabled. This bit is not a monitor and does not indicate a
subsequent loss of stability.
Oscillator is not yet stable or is disabled.
Oscillator is enabled and is stable and ready for use.
0
1
Status of the high frequency oscillator. This bit indicates when the oscillator is stable
after it is enabled. This bit is not a monitor and does not indicate a subsequent loss
of stability.
Oscillator is not yet stable or is disabled.
Oscillator is enabled and is stable and ready for use.
0x0
0x0
0x0
R
R
R
0
1
8
Status of the low frequency oscillator. This bit indicates when the oscillator is stable
after it is enabled. This bit is not a monitor and does not indicate a subsequent loss
of stability.
Oscillator is not yet stable or is disabled.
Oscillator is enabled and is stable and ready for use.
Reserved.
0
1
[7:3]
Rev. 0 | Page 123 of 130
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