AD73360L
Table IX. Control Register E Description
CONTROL REGISTER E
7
6
5
4
3
2
1
0
PUI4
I4GS2
I4GS1
I4GS0
PUI3
I3GS2
I3GS1
I3GS0
Bit Name
Description
0
1
2
3
4
5
6
7
I3GS0
I3GS1
I3GS2
PUI3
I4GS0
I4GS1
I4GS2
PUI4
ADC3:Input Gain Select (Bit 0)
ADC3:Input Gain Select (Bit 1)
ADC3:Input Gain Select (Bit 2)
Power Control (ADC3); 1 = ON, 0 = OFF
ADC4:Input Gain Select (Bit 0)
ADC4:Input Gain Select (Bit 1)
ADC4:Input Gain Select (Bit 2)
Power Control (ADC4); 1 = ON, 0 = OFF
Table X. Control Register F Description
CONTROL REGISTER F
7
6
5
4
3
2
1
0
PUI6
I6GS2
I6GS1
I6GS0
PUI5
I5GS2
I5GS1
I5GS0
Bit Name
Description
0
1
2
3
4
5
6
7
I5GS0
I5GS1
I5GS2
PUI5
I6GS0
I6GS1
I6GS2
PUI6
ADC5:Input Gain Select (Bit 0)
ADC5:Input Gain Select (Bit 1)
ADC5:Input Gain Select (Bit 2)
Power Control (ADC5); 1 = ON, 0 = OFF
ADC6:Input Gain Select (Bit 0)
ADC6:Input Gain Select (Bit 1)
ADC6:Input Gain Select (Bit 2)
Power Control (ADC6); 1 = ON, 0 = OFF
Table XI. Control Register G Description
CONTROL REGISTER G
7
6
5
4
3
2
1
0
SEEN
RMOD
CH6
CH5
CH4
CH3
CH2
CH1
Bit Name
Description
0
1
2
3
4
5
6
7
CH1
CH2
CH3
CH4
CH5
CH6
Channel 1 Select
Channel 2 Select
Channel 3 Select
Channel 4 Select
Channel 5 Select
Channel 6 Select
RMOD
SEEN
Reset Analog Modulator
Enable Single-Ended Input Mode
–13–
REV. 0
ADI [ ADI ]
