AD1846
Left Auxilia r y # 2 Input Contr ol (IXA3:0 = 4)
IXA3:0
D ata 7
D ata 6
D ata 5
D ata 4
D ata 3
D ata 2
D ata 1
D ata 0
4
LM X2
res
res
LX2A4
LX2A3
LX2A2
LX2A1
LX2A0
LX2A4:0 Left Auxiliary Input # 2 Attenuate Select. T he least significant bit of this gain/attenuate select represents –1.5 dB.
LX2A4:0 = 0 produces a +12 dB gain. LX2A4:0 = “01000” (8 decimal) produces 0 dB gain. Maximum attenuation is
–34.5 dB.
res
Reserved for future expansion. Always write zeros to these bits.
LMX2
Left Auxiliary # 2 Mute. T his bit, when set to 1, will mute the left channel of the Auxiliary # 2 input source. T his bit is set
to “1” after reset.
T his register’s initial state after reset is “1xx0 0000.”
Right Auxilia r y # 2 Input Contr ol (IXA3:0 = 5)
IXA3:0
D ata 7
D ata 6
D ata 5
D ata 4
D ata 3
D ata 2
D ata 1
D ata 0
5
RMX2
res
res
RX2A4
RX2A3
RX2A2
RX2A1
RX2A0
RX2A4:0 Right Auxiliary Input # 2 Attenuate Select. T he least significant bit of this gain/attenuate select represents –1.5 dB.
RX2A4:0 = 0 produces a +12 dB gain. RX2A4:0 = “01000” (8 decimal) produces 0 dB gain. Maximum attenuation is
–34.5 dB.
res
Reserved for future expansion. Always write zeros to these bits.
RMX2
Right Auxiliary # 2 Mute. T his bit, when set, will mute the right channel of the Auxiliary # 2 input source. T his bit is set to
“1” after reset.
T his register’s initial state after reset is “1xx0 0000.”
Left DAC Contr ol (IXA3:0 = 6)
IXA3:0
D ata 7
D ata 6
D ata 5
D ata 4
D ata 3
D ata 2
D ata 1
D ata 0
6
LD M
res
LD A5
LD A4
LD A3
LD A2
LD A1
LD A0
LDA5:0 Left DAC Attenuate Select. T he least significant bit of this attenuate select represents –1.5 dB. LDA5:0 = 0 produces a
0 dB attenuation. Maximum attenuation is –94.5 dB.
res
Reserved for future expansion. Always write a zero to this bit.
LDM
Left DAC Mute. T his bit, when set to 1, will mute the left DAC output. Auxiliary inputs are muted independently with
the Left Auxiliary Input Control Registers. T his bit is set to “1” after reset.
T his register’s initial state after reset is “1x00 0000.”
Right DAC Contr ol (IXA3:0 = 7)
IXA3:0
D ata 7
D ata 6
D ata 5
D ata 4
D ata 3
D ata 2
D ata 1
D ata 0
7
RDM
res
RDA5
RDA4
RDA3
RDA2
RDA1
RDA0
RDA5:0 Right DAC Attenuate Select. T he least significant bit of this attenuate select represents –1.5 dB. RDA5:0 = 0 produces
0 dB attenuation. Maximum attenuation is –94.5 dB.
res
Reserved for future expansion. Always write a zero to this bit.
RDM
Right DAC Mute. T his bit, when set to 1, will mute the right DAC output. Auxiliary inputs are muted independently with
the Right Auxiliary Input Control Registers. T his bit is set to “1” after reset.
T his register’s initial state after reset is “1x00 0000.”
–16–
REV. A
ADI [ ADI ]
