AD1846
Right Input Contr ol (IXA3:0 = 1)
IXA3:0
D ata 7
D ata 6
D ata 5
D ata 4
D ata 3
D ata 2
D ata 1
D ata 0
1
RSS1
RSS0
RMGE
res
RIG 3
RIG 2
RIG 1
RIG 0
RIG3:0 Right Input Gain Select. T he least significant bit of this gain select represents +1.5 dB. Maximum gain is +22.5 dB.
res
Reserved for future expansion. Always write a zero to this bit.
RMGE
Right Input Microphone Gain Enable. Setting this bit will enable the +18 dB digital gain of the right mic input signal.
RSS1:0 Right Input Source Select. T hese bits select the input source for the right channel gain stage preceding the right ADC.
0
1
2
3
Right Line Source Selected
Right Auxiliary 1 Source Selected
Right Microphone Source Selected
Right Post-Mixed DAC Output Source Selected
T his register’s initial state after reset is “000x 0000.”
Left Auxilia r y # 1 Input Contr ol (IXA3:0 = 2)
IXA3:0
D ata 7
D ata 6
D ata 5
D ata 4
D ata 3
D ata 2
D ata 1
D ata 0
2
LM X1
res
res
LX1A4
LX1A3
LX1A2
LX1A1
LX1A0
LX1A4:0 Left Auxiliary Input # 1 Attenuate Select. T he least significant bit of this gain/attenuate select represents –1.5 dB.
LX1A4:0 = 0 produces a +12 dB gain. LX1A4:0 = “01000” (8 decimal) produces 0 dB gain. Maximum attenuation is
–34.5 dB.
res
Reserved for future expansion. Always write zeros to these bits.
LMX1
Left Auxiliary # 1 Mute. T his bit, when set, will mute the left channel of the Auxiliary # 1 input source. T his bit is set to
“1” after reset.
T his register’s initial state after reset is “1xx0 0000.”
Right Auxilia r y # 1 Input Contr ol (IXA3:0 = 3)
IXA3:0
D ata 7
D ata 6
D ata 5
D ata 4
D ata 3
D ata 2
D ata 1
D ata 0
3
RMX1
res
res
RX1A4
RX1A3
RX1A2
RX1A1
RX1A0
RX1A4:0 Right Auxiliary Input # 1 Attenuate Select. T he least significant bit of this gain/attenuate select represents –1.5 dB.
RX1A4:0 = 0 produces a +12 dB gain. RX1A4:0 = “01000” (8 decimal) produces 0 dB gain. Maximum attenuation is
–34.5 dB.
res
Reserved for future expansion. Always write zeros to these bits.
RMX1
Right Auxiliary # 1 Mute. T his bit, when set, will mute the right channel of the Auxiliary # 1 input source. T his bit is set to
“1” after reset.
T his register’s initial state after reset is “1xx0 0000.”
REV. A
–15–
ADI [ ADI ]
