W89C840F
C04/CTSDR Transmit Start Demand Register
The register C04/CTSDR is used to request the W89C840F to do a transmission process.
Bit
Attribute
W
Bit name
TSD
Description
31:0
Transmit Start Demand
A write to this register will trigger the W89C840F‘ s transmit
DMA to fetch the descriptor for progressing the transmission
operation when the W89C840F’ s transmit DMA is staying at the
suspend state. Otherwise, the write operation will have no effect.
The W89C840F‘ s transmit DMA will return to the suspend state
if no descriptor is available. Meanwhile, the bit 2 of C14/CISR
will be asserted to claim the transmit buffer unavailable
If there is any descriptor available, W89C840F will start to the
transmit process.
C08/CRSDR Receive Start Demand Register
The register C04/CTSDR is used to request the W89C840F to do a receive process.
Bit
Attribute
W
Bit name
RSD
Description
31:0
Receive Start Demand
A write to this register will trigger the W89C840F‘ s receive
DMA to fetch the descriptor for progressing the receiving
operation when the W89C840F’ s receive DMA is staying at the
suspend state. Otherwise, the write operation will have no effect.
The W89C840F‘ s receive DMA will return to the suspend state
if no descriptor is available. Meanwhile, the bit 7 of C14/CISR
will be asserted to claim the receive buffer unavailable.
If there is any descriptor available, W89C840F will start to the
receive process and waiting for the incoming frames.
C0C/CRDLA Receive Descriptors List Addresses
The r egi st er s C0C/ CRDLA def i ne the start address of the receive descriptor list. It should be updated
only when the receive DMA state machine is staying at the stop state.
Bit
Attribute
R/W
Bit name
SRL
Description
31:2
1:0
Start of Receive List.
R/W
MBZ
Must be written as 0 for long word alignment.
Publication Release Date:April 1997
Revision A1
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