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VS1005 参数 Datasheet PDF下载

VS1005图片预览
型号: VS1005
PDF下载: 下载PDF文件 查看货源
内容描述: 此产品是芬兰VLSI刚刚研发成功的音频编解码芯片样品 [此产品是芬兰VLSI刚刚研发成功的音频编解码芯片样品]
分类和应用:
文件页数/大小: 104 页 / 1715 K
品牌: ETC [ ETC ]
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VS1005g Datasheet  
10 VS1005 PERIPHERALS AND REGISTERS  
ANA_CF0_LCKCHK and ANA_CF0_LCKST are used to poll 2 GHz vco lock status. When  
ANA_CF0_LCKCHK is first set and reset the lock status can be read from ANA_CF0_LCKST.  
If ANA_CF0_LCKST remains set the 2 GHz vco is locked.  
ANA_CF2 Bits  
Name Bits Description  
15-14 Reserved  
ANA_CF2_TSTE  
ANA_CF2_VCMST  
ANA_CF2_VCMDIS  
ANA_CF2_UTMENA  
ANA_CF2_LNAPD  
ANA_CF2_2GPD  
13  
12  
11  
10  
9
Hardware debug test enable, read only  
Ground buffer short circuit monitor  
Ground buffer driver short circuit protection disable  
High Speed USB UTM enable  
Low Noise Amplifier power down  
2 GHz VCO power down  
8
ANA_CF2_AMP1PD  
ANA_CF2_AMP2PD  
7
6
5
Microphone amplifier 1 power down  
Microphone amplifier 2 power down  
Reserved, use ’0’  
ANA_CF2_REF  
ANA_CF2_REFPD  
ANA_CF2_M3PD  
ANA_CF2_M2PD  
ANA_CF2_M1PD  
4
3
2
1
Analog reference voltage, 1.2V (0) or 1.6V (1)  
Analog reference powerdown  
ADC 3 power down, active low  
ADC 2 power down, active low  
ADC 1 power down, active low  
0
ANA_CF2 register controls several analog module power downs. The power downs are active  
low i.e. the module is enabled when power down register is set.  
ANA_CF3 Bits  
Name Bits Description  
ANA_CF3_480ENA  
ANA_CF3_UTMBIAS  
15  
14  
480 MHz clock enable  
Usb pad bias enable  
ANA_CF3_FMDIV[1:0] 13:12 FM divider selection 16, 20 or 24  
ANA_CF3_DIV[1:0] 11:10 VCO divider select register  
ANA_CF3_GAIN2[2:0]  
ANA_CF3_GAIN1[2:0]  
ANA_CF3_2GCNTR[3:0]  
9:7  
6:4  
3:0  
ADC 2 gain register  
ADC 1 gain register  
VCO center frequency register  
ANA_CF3_FMDIV is the VCO divider selection register for FM receiver. When the register is  
set the VCO clock is divided by 20 (FM mode). When the register is reset the divider value is  
16 (HS USB mode). ANA_CF3_FMDIV2 register selects the divider 24. In this divider mode  
the ANA_CF3_FMDIV should be set. The VCO frequency is therefore FM tuning frequency  
multiplied by 16, 20 or 24.  
FM Divider Bits  
FMDIV[1] FMDIV[0] Divider Description  
1
0
1
0
1
1
0
0
24  
24  
20  
16  
FM frequency is VCO frequency divided by 24  
Don’t Use (reserved)  
FM frequency is VCO frequency divided by 20  
FM frequency is VCO frequency divided by 16  
Version: 0.2, 2012-03-16  
40  
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