EAGLE
PRELIMINARY
Ver 1.3
3.31
AE32000C System Co-processor
3.31.1 General description
The AE32000C system co-processor consists of Memory Management Unit (MMU) which Instruction/Data Cache
controller and On Silicon ICE (OSI).
Features
Memory Management: The memory system in Eagle is managed by two memory modes.
- Real memory mode
In this mode, 4GB linear memory and only a part of memory reserved for OSI operation can be accessed.
Addresses of the processor comply with the actual memory addresses.
Address
Description
Size
ROM, SRAM (CS0#)
0000 0000h
2000 0000h
4000 0000h
6000 0000h
8000 0000h
A000 0000h
C000 0000h
E000 0000h
512M
512M
512M
512M
512M
512M
512M
512M
ROM, SRAM, SDRAM Bank 1 (CS1x)
ROM, SRAM, SDRAM Bank 2 (CS2x)
ROM, SRAM, SDRAM Bank 3 (CS3x)
ROM, SRAM, SDRAM Bank 4 (CS4x)
ROM, SRAM, SDRAM Bank 5 (CS5x)
ROM, SRAM, SDRAM Bank 6 (CS6x)
Texture Memory Bank
SDRAM Bank 7 (TSD_CSx,TSD_CSx2)
- Virtual memory mode
The processor can convert the addresses through TLB, 4 GB virtual memory can be accessed..
- Instruction / Data Cache
- 4 Way Set Associative Harvard cache(8-KByte instruction cache, 8-KByte data cache)
- Write back / Write through
- 16-Byte per line
- LRU Replacement
- Cache invalidation by Software
- 4-Word deep write buffer (FIFO)
*1. Refer to AE32000C (Lucifer): Hardware Reference Manual for configurations of AE32000C processor and system
co-processor (co-processor 0).
*2. Refer to AE32000C (Lucifer): Instruction Reference Manual.
Beijing Peak Microtech Co.Ltd.
CONFIDENTIAL
220
ETC [ ETC ]
