EAGLE
PRELIMINARY
Ver 1.3
3.29.18 JPEG DECODER FIFO Control Register (JDFCON)
Address : FFE1 8018h
Bit
31 : 10
9
R/W
R
R/W
Description
Default Value
Reserved
-
0b
Input data Format Selection
1:Big Endian Format
0:Little Endian Format
Reserved
7 : 8
6 : 0
R
R/W
-
0h
Data FIFO Threshold Level
This field identifies the threshold level of data FIFO. FIFO Fill
Request Interrupt occurs when number of data into FIFO is below the
value set in this field.
lower value must be used for setting values other than FIFO size(64)
3.29.19 JPEG DECODER WAITE CONTROL Register (JDWCON)
Address : FFE1 801Ch
Bit
31 : 7
6 : 0
R/W
R
R
Description
Default Value
Reserved
-
8h
WAITE FIFO Threshold Level
This field determines the decoding data output FIFO level. Decoder
goes into waiting mode when the number of data stored in FIFO is 8
times the WAITE FIFO Threshold Level value and operates again
when the remaining data in FIFO is below the value of WAITE FIFO
Threshold Level *8
The value range is between a minimum 1 to a maximum 8, the
smaller the value, the more frequent the decoder has to wait.
3.29.20 JPEG DECODER SOFTWARE RESET Register (JDSRST)
Address : FFE1 8024h
Bit
31 : 1
0
R/W
R
R/W
Description
Default Value
Reserved.
Software Reset
1:IDLE
-
1b
0:Reset
This bit forces a decoder initialization when JPEG decoder is not
operating under normal condition by taking in wrong data.
The decoder shall enter reset state when this bit is set to ‘0’, and
operation starts again when this bit is set to ‘1’.
3.29.21 JPEG DECODER INPUT DATA FIFO Register (JDIDF)
Address : FFE1 9000h
Bit
R/W
Description
Default Value
31 : 0
W
INPUT DATA FIFO
-
FIFO for JPEG Image input Stream
FIFO size:64
Beijing Peak Microtech Co.Ltd.
CONFIDENTIAL
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