Ver 1.3
PRELIMINARY
EAGLE
3.30
Internal Memory Controller
3.30.1 Features
- Control internal SRAM of size 2-KByte integrated in Eagle
- Arbitration between Core and NAND Flash Controller
- Consist of upper and lower memory, each 1 KBytes, and allows individual access.
- For NAND Flash Auto-boot, copy boot-code of NAND Flash memory for core processing.
- In Normal mode, NAND Flash Controller or Core may use it as internal buffer.
3.30.2 Block diagram
Figure 3-63 Internal Memory Controller Block Diagram
3.30.3 Memory Map
Boot Mode
Address
Description
Size
Inside 2K SRAM
2Kbyte
Normal Mode
1F00 0000h ~ 1F00 07FFh
1F00:0000h ~ 1F00:03FFh lower 1kb
1F00:0400h ~ 1F00:07FFh upper 1kb
Inside 2K SRAM
0000:0000h ~ 0000:03FFh lower 1kb
0000:0400h ~ 0000:07FFh upper 1kb
2Kbyte
Auto boot
Mode
0000 0000h ~ 0000 07FFh
Table 3-32 Internal Memory Map
219
CONFIDENTIAL
Beijing Peak Microtech Co.Ltd.