欢迎访问ic37.com |
会员登录 免费注册
发布采购

PKM32AG-Q 参数 Datasheet PDF下载

PKM32AG-Q图片预览
型号: PKM32AG-Q
PDF下载: 下载PDF文件 查看货源
内容描述: EAGLE是一款多媒体处理器.EAGLE集成了带有DSP特性的32位EISC CPU处理器、H.264解码器、JPEG解码器、2D图像引擎、声音混音器、具有OSD功能的CRT控制器、视频编码器、视频解码接口模块、USB主/从和通用I/O外设接口。 [EAGLE是一款多媒体处理器。EAGLE集成了带有DSP特性的32位EISC CPU处理器、H.264解码器、JPEG解码器、2D图像引擎、声音混音器、具有OSD功能的CRT控制器、视频编码器、视频解码接口模块、USB主/从和通用I/O外设接口。]
分类和应用: 解码器编码器控制器
文件页数/大小: 235 页 / 4257 K
品牌: ETC [ ETC ]
 浏览型号PKM32AG-Q的Datasheet PDF文件第162页浏览型号PKM32AG-Q的Datasheet PDF文件第163页浏览型号PKM32AG-Q的Datasheet PDF文件第164页浏览型号PKM32AG-Q的Datasheet PDF文件第165页浏览型号PKM32AG-Q的Datasheet PDF文件第167页浏览型号PKM32AG-Q的Datasheet PDF文件第168页浏览型号PKM32AG-Q的Datasheet PDF文件第169页浏览型号PKM32AG-Q的Datasheet PDF文件第170页  
EAGLE  
PRELIMINARY  
Ver 1.3  
3.20.5 Key Scan Control Register (KSCON)  
Address : FFE0 8C00h  
Bit  
31 : 3  
2
R/W  
R
R/W  
Description  
Default Value  
Reserved  
-
0b  
Scan Mode select bits  
0: Key press mode  
1: Key press & release mode  
Reserved  
Scan Enable bit  
1: Scan Enable.  
0: Scan Disable.  
1
0
R
R/W  
-
0b  
Scan Enable Bit of Key Scan Control register enables or disables the operation of Key-Pad Controller.  
Scan mode and the divisor value of Scan Counter register must be configured prior to enabling key scan operation for  
stability purposes.  
Scan Mode Selection Bits of Control Register configures the Scan Mode.  
In Key press mode, Key is recognized when the Key is pressed. In Press & Release mode, Key is recognized when the Key is  
pressed or released.  
3.20.6 Key Scan Counter Register (KSCNT)  
Address : FFE0 8C04h  
Bit  
31 : 16  
15 : 0  
R/W  
R
R/W  
Description  
Reserved  
Scan clock divide ratio setting bits.  
Default Value  
-
FFFFh  
Scan Clock Divisor bits in Counter Register determines the Scan rate.  
Scanning Frequency = APB Clock / { ( Clock Divisor + 1 ) * 11 } ( Hz )  
3.20.7 Key Scan Data Register 1 (KSD1)  
Address: FFE0 8C08h  
Bit  
31:25  
24: 0  
R/W  
R
R
Description  
Default Value  
Reserved  
Scanned Switch value  
-
00 0000h  
This register stores the state of each switch in a 5x5 Key Matrix. This bit is set when a switch is pressed and a zero means  
that the corresponding switch is not pressed. This allows user to acquire the state of key matrix by doing a read to this  
register.  
Bit  
24  
23  
22  
21  
20  
Switch  
SW44  
SW43  
SW42  
SW41  
SW40  
Bit  
19  
18  
17  
16  
15  
Switch  
SW34  
SW33  
SW32  
SW31  
SW30  
Bit  
14  
13  
12  
11  
10  
Switch  
SW24  
SW23  
SW22  
SW21  
SW20  
Bit  
9
8
7
6
Switch  
SW14  
SW13  
SW12  
SW11  
SW10  
Bit  
4
3
2
1
Switch  
SW04  
SW03  
SW02  
SW01  
SW00  
5
0
Beijing Peak Microtech Co.Ltd.  
CONFIDENTIAL  
166  
 复制成功!