EAGLE
PRELIMINARY
Ver 1.3
This is calculated value of UDLLn UDLMn when APB clock is 50Mhz
Baud Rate
1200
UDLMn, UDLLn[15:0]
0A2Ch
0516h
028Bh
0145h
00D9h
00A2h
0051h
0036h
001Bh
2400
4800
9600
14400
19200
38400
57600
115200
Table 3-25 UART Baud Rate Setting
3.19.11 Operation Sequence Flow
To transmit data using the 16650 UART of Eagle, follow the basic control flow described as below.
UART Initialization
1 Program UFCR and ULCR registers to set up the basic transmission environment, such as FIFO LEVEL setting or
interrupt enabling.
*The value configured in UFCR and ULCR registers are user-dependent. Proper value should be selected according to
the operation environment.
2 Configure UDLL register to obtain desirable transmission rate.
3 Access to UTH or URB is enabled by setting the 7th bit of ULCR to ‘0’.
*Since 16550 UART shares the address of internal registers, bit 7th of ULCR can be configured by setting the Divisor
Latch Access Bit (DLAB). (refer to Table 3-23)
Data Transmission
1 Initialize UART.
2 Decides the start of data transmission by checking the Transmitter Empty(TEMT) bit and Transmitter Holding
Register Empty(THRE) bit of ULSTAT.
** The value of checking bit changes depending on whether FIFO is used or not.
3 For data transmission, write the transmitting data in UTH
Data Reception
1 Initalize UART.
2 Check Data Ready(DR) of ULSR or interrupt to detect the reception of data.
** An error condition may occur in UART during data reception, hence programmer should check the error related
bits of ULSTAT register or UIIR register in Interrupt Mode as appropriate.
3 When data is received, URBR and received data are read.
Beijing Peak Microtech Co.Ltd.
CONFIDENTIAL
164
ETC [ ETC ]
