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PKM32AG-Q 参数 Datasheet PDF下载

PKM32AG-Q图片预览
型号: PKM32AG-Q
PDF下载: 下载PDF文件 查看货源
内容描述: EAGLE是一款多媒体处理器.EAGLE集成了带有DSP特性的32位EISC CPU处理器、H.264解码器、JPEG解码器、2D图像引擎、声音混音器、具有OSD功能的CRT控制器、视频编码器、视频解码接口模块、USB主/从和通用I/O外设接口。 [EAGLE是一款多媒体处理器。EAGLE集成了带有DSP特性的32位EISC CPU处理器、H.264解码器、JPEG解码器、2D图像引擎、声音混音器、具有OSD功能的CRT控制器、视频编码器、视频解码接口模块、USB主/从和通用I/O外设接口。]
分类和应用: 解码器编码器控制器
文件页数/大小: 235 页 / 4257 K
品牌: ETC [ ETC ]
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Ver 1.3  
PRELIMINARY  
EAGLE  
3.19.4 UART Channel 0~3 Interrupt Enable Register (UIE0 ~ UIE3)  
Address : FFE0 8004h / FFE0 8024h / FFE0 8044h / FFE0 8064h  
Bit  
31: 3  
2
R/W  
R
R/W  
Description  
Default Value  
Reserved.  
-
0b  
Enable Receiver Line Status Interrupt(ERLSI)  
0 : Disable  
1 : Enable  
1
0
R/W  
R/W  
Enable Transmitter Holding Register Empty Interrupt(ETHREI)  
0 : Disable  
1 : Enable  
0b  
0b  
Enable Received Data Available Interrupt(ERDAI)  
0 : Disable  
1 : Enable  
3.19.5 UART Channel 0~3 Interrupt Identification Register (UII0 ~ UII3)  
Address : FFE0 8008h / FFE0 8028h / FFE0 8048h / FFE0 8068h  
Bit  
31 : 8  
7 : 6  
5 : 4  
3 : 1  
0
R/W  
R
R
R
R
Description  
Default Value  
Reserved.  
-
00b  
-
000b  
1b  
FIFO Enabled : Always zero if not in FIFO mode  
Reserved  
Interrupt ID ( Note Table 3, Interrupt Control Function)  
Interrupt Pending : When this bit is a logic 1, no interrupt is pending  
R
Interrupt  
Identification Register  
Priority  
Level  
Interrupt  
Type  
Interrupt Reset  
Condition  
Interrupt Source  
Bit 3 Bit 2 Bit 1 Bit 0  
0
0
0
1
-
None  
Receiver  
Highest Line  
Status  
Received  
Second Data  
None  
-
Overrun Error or Parity Error  
Framing Error or Break  
Interrupt  
Reading the Line Status  
Register  
0
1
1
0
Reading the Receiver  
Buffer Register or the FIFO  
Drops Below the Trigger  
Level  
Receiver Data Available or  
Trigger Level Reached  
0
1
0
1
1
0
0
0
1
0
0
0
Available  
No Characters have been  
removed from or input to the  
RCVR FIFO during the last 4 Reading the Receiver  
Char. times, and there is at  
least 1 Char. in it during this  
Time  
Character  
Second Timeout  
Indication  
Buffer Register  
Transmitter  
Holding  
Register  
Empty  
Reading the IIR Register  
(if source of interrupt) or  
Writing into the Transmitter  
Holding Register  
Transmitter Holding  
Register Empty  
Third  
Table 3-24 UART Interrupt Control Function  
161  
CONFIDENTIAL  
Beijing Peak Microtech Co.Ltd.  
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