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TMXF281553BAL-3C-DB 参数 Datasheet PDF下载

TMXF281553BAL-3C-DB图片预览
型号: TMXF281553BAL-3C-DB
PDF下载: 下载PDF文件 查看货源
内容描述: 电信/数据通信\n [Telecomm/Datacomm ]
分类和应用: 电信数据通信
文件页数/大小: 784 页 / 10078 K
品牌: ETC [ ETC ]
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Data Sheet  
June 2002  
TMXF28155 Supermapper  
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1  
12 28-Channel Framer Registers (continued)  
Table 328. FRM_PMGR6, Performance Monitor Global Register 6 (R/W)  
Address* Bit Name Function  
Reset  
Default  
0x80P35 15:0 FRM_ESFSEST[15:0] ESF Severely Errored Second Threshold for All ESF  
Formatted Channels. A bursty errored second will be  
recorded if the number of events is greater than the errored  
second threshold but less than the severely errored second  
threshold.  
0x0140  
*
P = 0x0 for the receive path, and P = 0x1 for the transmit path.  
Table 329. FRM_PMGR7, Performance Monitor Global Register 7 (R/W)  
These bits enable the errored events used to determine errored and severely errored seconds in the DS1 modes.  
Address* Bit  
Name  
Function  
Reset  
Default  
0x80P36 15:9  
8
RSVD  
Reserved. Must write to 0.  
0x00  
0
FRM_DSEF DS1 Severely Errored Frame Enable. See FRM_SEFS (Table 412 on  
page 293).  
7
6
5
4
3
2
1
0
FRM_DLFA DS1 Loss of Frame Alignment Enable.  
FRM_DRFA DS1 Remote Frame Alarm Enable.  
FRM_DSLIP DS1 Slip Enable.  
0
0
0
0
0
0
0
0
FRM_DLOS DS1 Loss of Signal Enable.  
FRM_DAIS DS1 Alarm Indication Signal Enable.  
FRM_DCRC DS1 CRC-6 Error Enable.  
FRM_DFS DS1 Fs Framing Bit Error Enable (SF Only).  
FRM_DFT DS1 Ft Framing Bit Error Enable (SF and ESF).  
*
P = 0x0 for the receive path, and P = 0x1 for the transmit path.  
Table 330. FRM_PMGR8, Performance Monitor Global Register 8 (R/W)  
Address* Bit Name Function  
Reset  
Default  
0x80P37 15:0 FRM_CCT[15:0] CEPT Excessive CRC Threshold—Default 915. This register 0x0393  
sets the 1 s CRC threshold at which an excessive CRC error  
condition is reported, and the 1 s CRC threshold at which a  
reframe may be forced.  
*
P = 0x0 for the receive path, and P = 0x1 for the transmit path.  
Table 331. FRM_PMGR9, Performance Monitor Global Register 9 (R/W)  
Address* Bit Name Function  
Reset  
Default  
0x80P38 15:0 FRM_CSEST[15:0] CEPT Severely Errored Second Threshold for All CEPT  
0x0000  
Formatted Channels.  
*
P = 0x0 for the receive path, and P = 0x1 for the transmit path.  
Agere Systems Inc.  
253  
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