Data Sheet
June 2002
TMXF28155 Supermapper
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
12 28-Channel Framer Registers (continued)
Table 334. FRM_PMGR12, Performance Monitor Global Register 12 (R/W)
Address* Bit
Name
Function
Reset
Defau
lt
0x80P3B 15
FRM_CRAI_AIS
FRM_CRAI_OOF
Send RAI Upon Detection of AIS Enable in CEPT
Mode.
0
0
0
0
0
0
0
0
0
0
14
13
12
11
10
9
Send RAI Upon Detection of OOF Enable in CEPT
Mode.
FRM_CRAI_LOS
Send RAI Upon Detection of LOS Enable in CEPT
Mode.
FRM_CRAI_SA6EQC
FRM_CRAI_SA6EQ8
FRM_CRAI_CRCTX
FRM_CRAI_LTS0MFA
FRM_CRAI_LTS16MFA
FRM_CRAI_8MSEX
Send RAI Upon Detection of Sa6 = (0xC) Enable in
CEPT Mode.
Send RAI Upon Detection of Sa6 = (0x8) Enable in
CEPT Mode.
Send RAI Upon Detection of CRCTX Enable in CEPT
Mode.
Send RAI Upon Detection of LTS0MFA Enable in CEPT
Mode.
8
Send RAI Upon Detection of LTS16MFA Enable in
CEPT Mode.
7
Send RAI Upon Detection of 8 ms Timer Expiration
Enable in CEPT Mode.
6
SPLIT_400MS_100MS_EN Distinguishing Between CEPT CRC4 with 400 ms
Timer and 100 ms Timer Enable. When
SPLIT_400MS_100MS_EN = 0, there is no distinction
between CEPT CRC4 with 100 ms timer and 400 ms
timer. FRM_CRAI_CRCTX (0x80P3B, bit 10),
FRM_CRAI_LTS0MFA (0x80P3B, bit 9), and
FRM_CRAI_8MSEX (0x80P3B, bit 7) apply to any link that
is configured either as CEPT CRC4 with a 400 ms timer or
a 100 ms timer. When SPLIT_400MS_100MS_EN = 1,
FRM_CRAI_CRCTX (0x80P3B, bit 10),
FRM_CRAI_LTS0MFA (0x80P3B, bit 9), and
FRM_CRAI_8MSEX (0x80P3B bit, 7) apply only to links
that are configured as CEPT CRC4 witha 400 ms timer.
Links configured as CEPT CRC4 with a 100 ms timer are
determined by the configuration in bits
FRM_CRAI_CRCTX_100 ms (0x80P21, bit 10),
FRM_CRAI_LTS0MFA_100 ms (0x80P21, bit 9), and
FRM_CRAI_8MSEX_100 ms (0x80P21, bit 7).
5:3
2
RSVD
Reserved. Must write to 0.
0
0
0
0
FRM_DSRAI_LOS
FRM_DSRAI_OOF
FRM_DSRAI_AIS
Send RAI Upon Detection of LOS Enable in DS1 Mode.
Send RAI Upon Detection of OOF Enable in DS1 Mode.
Send RAI Upon Detection of AIS Enable in DS1 Mode.
1
0
*
P = 0x0 for the receive path, and P = 0x1 for the transmit path.
Agere Systems Inc.
255
ETC [ ETC ]
