Data Sheet
June 1999
ORCA Series 2 FPGAs
Programmable Logic Cells (continued)
] 0 [ 4 V X
] 1 [ 4 V X
] 2 [ 4 V X
] 3 [ 4 V X
]
]
]
]
[ 1 V X 4
[ 2 V X 4
[ 3 V X 4
[ 0 V X 4
] 0 [ 1 V X
] 1 [ 1 V X
] 2 [ 1 V X
] 3 [ 1 V X
]
]
]
]
[ 0 V X 1
[ 1 V X 1
[ 2 V X 1
[ 3 V X 1
C K T
C K B
C K T
C K B
R N G S
R N G S
] 0 [ B I N
] 1 [ B I N
] 2 [ B I N
] 3 [ B I N
] 4 [ B I N
]
]
]
]
]
T [ 0 I N
T [ 1 I N
T [ 2 I N
T [ 3 I N
T [ 4 I N
B
R A R C Y _
T _
C A R R Y
] 0 [ L V X
] 1 [ L V X
] 2 [ L V X
] 3 [ L V X
]
]
]
]
[ 1 V X L
[ 2 V X L
[ 3 V X L
[ 0 V X L
]
H [ 0 V X
H [ 1 V X
H [ 2 V X
H [ 3 V X
]
]
]
]
H [ 0 V X
H [ 1 V X
H [ 2 V X
H [ 3 V X
]
]
]
] 4 [ 1 V X
] 5 [ 1 V X
] 6 [ 1 V X
] 7 [ 1 V X
]
]
]
]
[ 4 V X 1
[ 5 V X 1
[ 6 V X 1
[ 7 V X 1
] 4 [ 4 V X
] 5 [ 4 V X
] 6 [ 4 V X
] 7 [ 4 V X
]
]
]
]
[ 5 V X 4
[ 6 V X 4
[ 7 V X 4
[ 4 V X 4
5-4479(F).r2
Figure 23. PLC Architecture
Lucent Technologies Inc.
23
ETC [ ETC ]
