PCT1789W DATA SHEET
PRELIMINARY
PCT303DW FUNCTIONAL DESCRIPTION
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The PCT303DW also supports an additional power- associated circuitry. When on-hook line monitor is active
down mode. When both the PDN (register 6, bit 3) and (if a phone line is present), the LCS value will be a 1111b
PDL (register 6, bit 4) are set, the chip-set enters a value.
complete power-down mode and draws negligible
If a phone line is not present, the LCS value will be a
current. Set the PDL bit either before setting the PDN bit
zero value. The designer must allow for a 5/Fs delay
or at the same time. In this mode, the RGDT pin does
before making a decision. Refer to “Loop Current
not function. Normal operation may be restored using
Monitor” for more details on the LCS bits.
the same process for taking the chip-set out of sleep
mode.
Loop Current Monitor
Analog Output
When the system is in an off-hook state, the LCS bits of
register 12 indicate the approximate amount of DC loop
current that is flowing in the loop. The LCS is a 4-bit
value ranging from zero to fifteen. Each unit represents
approximately 6 mA of loop current. An LCS value of
zero means the loop current is less than required for
normal operation and the system should be on-hook. An
LCS value of 15 means the loop current is greater than
The PCT303DW supports an analog output (AOUT) for
driving the call progress speaker found with most of
today’s modems. AOUT is an analog signal that is
comprised of a mix of the transmit and receive signals.
The receive portion of this mixed signal has a 0 dB gain,
while the transmit signal has a gain of –20 dB.
The transmit and receive signals of the AOUT signal 120 mA. To determine a rough approximation of the
have independent mute controls. The ATM bit (register current (mA) flowing in the loop the following equation
6, bit 6) mutes the transmit portion, while the ARM may be used:
(register 6, bit 5) mutes the receive portion. Figure 3 on
page 8 illustrates a recommended application circuit.
LoopCurrent » 6 × LCS + 12
Note that in the configuration shown, the LM386
The LCS detector has a built-in hysteresis of 2 mA of
provides a gain of 26 dB. Additional gain adjustments
current. This allows for a stable LCS value when the
may be made by varying the voltage divider created by
loop current is near a transition level. The LCS value is
R1 and R3 of Figure 3.
a rough approximation of the loop current, and the
designer is advised to use this value in a relative means
rather than an absolute value.
On-Hook Line Monitor
The PCT303DW allows the user to detect line activity
This feature enables the modem to determine if an
when the device is in an on-hook state. When the
additional line has “picked up” while the modem is
system is on-hook, the line data can be passed to the
transferring information. In the case of a second phone
DSP across the serial port while drawing a small amount
going off-hook, the loop current falls approximately 50%
of DC current from the line. This feature is similar to the
and is reflected in the value of the LCS bits.
passing of line information (such as caller ID), while on-
hook, following a ring signal detection. To activate this
feature, set the ONHM bit in register 5.
Gain Control
The PCT303DW supports multiple gain and attenuation
The on-hook line monitor can also be used to detect
settings for the receive and transmit paths, respectively.
whether a phone line is physically connected to the
When the ARX bit is set, 6 dB of gain is applied to the
PCT303W and associated circuitry. When the on-hook
receive path. When the ATX bit is set, –3 dB of gain is
line monitor is activated (if no line is connected), the
applied to the transmit path.
output of SDO will move towards a negative full scale
Register 15 can be used to provide additional gain
control. For register 15 to have an effect on the receive
and transmit paths, the ATX and ARX bits of register 13
must be zero.
value (–32768). The value is guaranteed to be at least
89% of negative full scale.
If a line is present while in on-hook line monitor mode,
SDO will have a near zero value. The designer must
allow for the group delay of the receive filter before
making a decision.
The receive path can support gains of 0, 3, 6, 9, and 12
dB. The gain is selected by bits 2:0 (ARX2:ARX0). The
receive path can also be muted by setting bit 3 (RXM).
The transmit path can support attenuations of 0, 3, 6, 9,
and 12 dB. The attenuation is selected by bits 6:4
(ATX2:ATX0). The transmit path can also be muted by
setting bit 7 (TXM).
The on-hook line monitor may be used in conjunction
with the loop current sense bits to determine if a phone
line is physically connected to the PCT303W and
PRELIMINARY
PC-TEL, Inc.
25
1789W0DOCDAT06A-0299
ETC [ ETC ]
