Functional Description
4.1.1
Memory Address Ranges
Figure 4-1 provides a detailed 82443BX memory map indicating specific memory regions defined
by AGP and supported by the Intel® 440BX AGPset.
Figure 4-1. Memory System Address Space
System Memory Space
64 GB
Extended CPU
Memory Space
4 GB
PCI Memory
Graphics Device
Access
(e.g., memory-mapped
control/status registers)
Window For Non-Prefetchable
PCI accesses to AGP
(Base=MBASE Reg. (20h); Dev 0)
(Size=MLIMIT Reg. (22h); Dev 0)
PCI Memory
accesses to AGP
PCI Memory
Local Graphics Memory
Window For Prefetchable
PCI accesses to AGP
(Base=PMBASE Reg. (24h); Dev 1)
(Size=PMLIMIT Reg. (26h); Dev 1)
- Frame Buffer
PCI Memory
accesses to AGP
- Rendering Buffer
- Depth Buffer (Z)
- Video Capture Buffer
PCI Memory
0FFFFFh
1 MB
AGP Aperture
AGP Aperture Range
(Base=APBASE Reg. (10h); Dev 0)
(Size=APSIZE Reg. (B4h); Dev 0)
- Textures
AGP
Aperture
Upper BIOS Area
(64 KB)
- Other Surfaces
- Instruction
Stream
0F0000h
0EFFFFh
960 KB
896 KB
PCI Memory
Lower BIOS Area
(64 KB)
TOM (1 GB Max.)
16KBx4
GART
0E0000h
0DFFFFh
AGP Data
AGP Data
Expansion Card BIOS
and Buffer Area
Graphics Address Re-Mapping Table
(Base=ATTBASE Reg. (B8h); Dev 0)
(128 KB) 16KBx8
AGP Data
Main
Memory
0C0000h
0BFFFFh
16 MB
15 MB
768 KB
Optional ISA Hole
Standard PCI/ISA Video
Memory (SMM Mem)
128 KB
1 MB
0FFFFFh
0A0000h
09FFFFh
640 KB
512 KB
0 KB
Video BIOS
(shadowed in memory)
DOS
Compatibility
Memory
C0000h
BFFFFh
Optional Fixed Memory
Hole
Graphics Adapter
(128 KB)
080000h
07FFFFh
A0000h
DOS Area
(512 KB)
System/Application SW
000000h
00000h
AGP aperture, GART, and
Graphics data structures mapped by GART
Notes:
1. Graphics Device accesses to the AGP aperture
invoke AGP transfer protocol on the AGP Bus
and use GART to re- map the accesses to
graphics data structures located in main
memory.
PCI memory accesses to AGP
PCI memory accesses to primary PCI bus
2. The two window regions provide PCI accesses
over the AGP.
Main memory (physical memory) and
CPU extended memory (above 4 GB)
mem_map2.vsd
4-2
82443BX Host Bridge Datasheet