<ꢀ5ꢁꢀꢂꢃ<ꢀ.ꢁꢀꢂ
'PJCPEGFꢄ<ꢁꢀꢂꢄ/KETQRTQEGUUQT
ZiLOG
&/#ꢄ/'/14;ꢄ#&&4'55ꢄ4')+56'4ꢄ%*#00'.ꢄꢁ
The DMA Memory Address Register Channel 1 specifies
the physical memory address for channel 1 transfers. The
address may be a destination or a source memory location.
Theregistercontains20bitsandmayspecifyupto1024 KB
memory addresses.
&/#ꢄ/GOQT[ꢄ#FFTGUUꢄ4GIKUVGTꢎꢄ%JCPPGNꢄꢁ*
/PGOQPKEꢄ/#4ꢁ*
#FFTGUUꢄꢇꢏ*
&/#ꢄ/GOQT[ꢄ#FFTGUUꢄ4GIKUVGTꢎꢄ%JCPPGNꢄꢁ.
(KIWTG ꢈꢈꢆ &/#ꢄ/GOQT[ꢄ#FFTGUUꢄ4GIKUVGTꢎꢄ
%JCPPGNꢄꢁ*
/PGOQPKEꢄ/#4ꢁ.
#FFTGUUꢄꢇꢀ*
&/#ꢄ/GOQT[ꢄ#FFTGUUꢄ4GIKUVGTꢎꢄ%JCPPGNꢄꢁ$
/PGOQPKEꢄ/#4ꢁ$
#FFTGUUꢄꢇ#*
(KIWTG ꢈꢑꢆ &/#ꢄ/GOQT[ꢄ#FFTGUUꢄ4GIKUVGTꢎꢄ
%JCPPGNꢄꢁ.
#ꢄꢋ #ꢄꢁ
4GUGTXGF
(KIWTG ꢈꢐꢆ &/#ꢄ/GOQT[ꢄ#FFTGUUꢄ4GIKUVGTꢎꢄ
%JCPPGNꢄꢁ$
ꢏꢁ
2ꢅ4ꢅ'ꢅ.ꢅ+ꢅ/ꢅ+ꢅ0ꢅ#ꢅ4ꢅ;
&5ꢀꢀꢁꢀꢀꢂꢃ</2ꢀꢂꢀꢀ