Z8018x Family
MPU User Manual
267
Table 51. Bus and Control Signal Condition in Each Machine Cycle (Continued)
Machine
Cycle
Instruction
States
Address
Data
RD WR MREQ IORQ M1 HALT ST
MC1
MC2
MC3
MC4
T1T2T3 1st Op Code 1st Op
Address Code
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
1
1
1
1
0
1
1
1
T1T2T3 2nd Op Code 2nd Op
Address
Code
T1T2T3 1st operand
Address
n
LD (mn),IX
LD (mn),IY
T1T2T3 2nd operand
Address
m
Z
MC5
MC6
Ti
*
1
1
1
0
1
0
1
1
1
1
1
1
1
1
T1T2T3 mn
IXL
IYL
MC7
MC1
T1T2T3 mn+1
IXH
IYH
1
0
0
1
0
0
1
1
1
0
1
1
1
0
T1T2T3 1st Op Code 1st Op
LD SP, HL
Address
Code
MC2
MC1
Ti
*
Z
1
0
1
1
1
0
1
1
1
0
1
1
1
0
T1T2T3 1st Op Code 1st Op
Address Code
LD SP,IX
LD SP,IY
MC2
T1T2T3 2nd Op Code 2nd Op
0
1
0
1
0
1
1
Address
Code
MC3
MC1
Ti
*
Z
1
0
1
1
1
0
1
1
1
0
1
1
1
0
T1T2T3 1st Op Code 1st Op
Address Code
LDI
LDD
MC2
T1T2T3 2nd Op Code 2nd Op
0
1
0
1
0
1
1
Address
T1T2T3 HL
T1T2T3 DE
Code
MC3
MC4
DATA
DATA
0
1
1
0
0
0
1
1
1
1
1
1
1
1
UM005001-ZMP0400
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