eZ80L92 MCU
Product Specification
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eZ80® CPU Core
Zilog’s eZ80® CPU is the first 8-bit microprocessor to support 16 MB linear addressing.
Each software module or task under a real-time executive or operating system can operate
in Z80 compatible (64 KB) mode or full 24-bit (16 MB) address mode.
The eZ80 CPU instruction set is a superset of the instruction sets for the Z80 and Z180
CPUs. Z80 and Z180 programs are executable on an eZ80 CPU with little or no
modification.
Features
The features of eZ80 CPU includes:
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Code-compatible with Z80 and Z180 products.
24-bit linear address space.
Single-cycle instruction fetch.
Pipelined fetch, decode, and execute.
Dual Stack Pointers for ADL (24-bit) and Z80 (16-bit) memory modes.
24-bit CPU registers and arithmetic logic unit (ALU).
Debug support.
Non-maskable Interrupt (NMI) supporting 128 maskable vectored interrupts.
New and Improved Instructions
These new instructions are:
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Four new block transfer instructions provide DMA-like operations for memory-to-I/O
and I/O-to-memory transfers:
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INDRX (input from I/O, decrement the memory address, leave the I/O address
unchanged, and repeat).
INIRX (input from I/O, increment the memory address, leave the I/O address
unchanged, and repeat).
OTDRX (output to I/O, decrement the memory address, leave the I/O address
unchanged, and repeat).
OTIRX (output to I/O, increment the memory address, leave the I/O address
unchanged, and repeat).
PS013015-0316
eZ80® CPU Core
ZILOG [ ZILOG, INC. ]
