eZ80L92 MCU
Product Specification
34
Low-Power Modes
The ZLP12840 MCU provides a range of power-saving features. The highest level of
power reduction is provided by SLEEP mode. The next level of power reduction is pro-
vided by the HALT instruction. The lowest level of power reduction is provided by the
clock peripheral power-down registers.
SLEEP Mode
Execution of the eZ80 CPU’s SLP instruction places the ZLP12840 MCU into SLEEP
mode. In SLEEP mode, the operating characteristics are:
•
•
•
•
•
Primary crystal oscillator is disabled.
System clock is disabled.
eZ80 CPU is idle.
Program counter (PC) stops incrementing.
32 kHz crystal oscillator continues to operate and drives the Real-Time Clock and the
Watchdog Timer (if WDT is configured to operate from the 32 kHz oscillator.)
The eZ80 CPU can be brought out of SLEEP mode by any of the following operations:
•
•
•
RESET through the external RESET pin driven Low.
RESET through a Real-Time Clock alarm.
RESET through a Watchdog Timer time-out (if running off of the 32 kHz oscillator and
configured to generate a RESET upon time-out).
•
RESET through execution of a Debug RESET command.
After exiting SLEEP mode, the standard RESET delay occurs to allow the primary crystal
oscillator to stabilize. See Reset on page 33.
HALT Mode
Execution of the eZ80 CPU’s HALT instruction places the ZLP12840 MCU into HALT
mode. In HALT mode, the operating characteristics are:
•
•
•
•
Primary crystal oscillator is enabled and continues to operate.
System clock is enabled and continues to operate.
eZ80 CPU is idle.
Program counter stops incrementing.
PS013015-0316
Low-Power Modes
ZILOG [ ZILOG, INC. ]
