eZ80L92 MCU
Product Specification
30
Table 3. Register Map (Continued)
Address
Reset
(hex)
CPU
Access
Page
No
(hex)
00E9
00EA
00EB
00EC
00ED
Mnemonic
RTC_AMIN
RTC_AHRS
RTC_ADOW
RTC_ACTRL
RTC_CTRL
Name
RTC Alarm Minutes Register
RTC Alarm Hours Register
RTC Alarm Day-of-the-Week Register
RTC Alarm Control Register
XX
XX
0X
00
R/W
R/W
R/W
R/W
R/W
99
100
101
102
103
4
RTC Control Register
x0xxxx00b/
x0xxxx10b
Chip Select Bus Mode Control
00F0
00F1
00F2
00F3
Notes
CS0_BMC
CS1_BMC
CS2_BMC
CS3_BMC
Chip Select 0 Bus Mode Control Register
Chip Select 1 Bus Mode Control Register
Chip Select 2 Bus Mode Control Register
Chip Select 3 Bus Mode Control Register
02h
02h
02h
02h
R/W
R/W
R/W
R/W
71
71
71
71
1. After an external pin reset, the Watchdog Timer Control register is reset to 00h. After a Watchdog Timer time-out
reset, the Watchdog Timer Control register is reset to 20h.
2. When the CPU reads this register, the current sampled value of the port is read.
3. Read-only if RTC is locked; Read/Write if RTC is unlocked.
4. After an external pin reset or a WDT reset, the RTC Control register is reset to x0xxxx00b. After an RTC Alarm
Sleep-Mode Recovery reset, the RTC Control register is reset to x0xxxx10b.
PS013015-0316
Register Map
ZILOG [ ZILOG, INC. ]
