eZ80L92 MCU
Product Specification
29
Table 3. Register Map (Continued)
Address
Reset
(hex)
CPU
Access
Page
No
(hex)
Mnemonic
Name
Universal Asynchronous Receiver/Transmitter 1 (UART1) Block
00D0
UART1_RBR
UART1_THR
UART 1 Receive Buffer Register
UART 1 Transmit Holding Register
XX
XX
02
R
W
112
111
110
UART1_BRG_L UART 1 Baud Rate Generator
Register—Low Byte
R/W
00D1
00D2
UART1_IER
UART 1 Interrupt Enable Register
00
00
R/W
R/W
112
110
UART1_BRG_H UART 1 Baud Rate Generator
Register—High Byte
UART1_IIR
UART 1 Interrupt Identification Register
UART 1 FIFO Control Register
UART 1 Line Control Register
01
00
00
00
R
113
114
115
117
UART1_FCTL
UART1_LCTL
UART1_MCTL
W
00D3
00D4
R/W
R/W
UART 1 Modem Control Register
Universal Asynchronous Receiver/Transmitter 1 (UART1) Block
00D5
00D6
00D7
UART1_LSR
UART1_MSR
UART1_SPR
UART 1 Line Status Register
UART 1 Modem Status Register
UART 1 Scratch Pad Register
60
XX
00
R/W
R/W
R/W
118
120
122
Low-Power Control
00DB
00DC
CLK_PPD1
CLK_PPD2
Clock Peripheral Power-Down Register 1
Clock Peripheral Power-Down Register 2
00
00
R/W
R/W
36
37
Real-Time Clock
3
00E0
00E1
00E2
00E3
00E4
00E5
00E6
00E7
00E8
RTC_SEC
RTC Seconds Register
XX
XX
XX
XX
XX
XX
XX
XX
XX
R/W
90
91
92
93
94
95
96
97
98
3
RTC_MIN
RTC_HRS
RTC_DOW
RTC_DOM
RTC_MON
RTC_YR
RTC Minutes Register
R/W
3
RTC Hours Register
R/W
3
RTC Day-of-the-Week Register
RTC Day-of-the-Month Register
RTC Month Register
R/W
3
R/W
3
R/W
3
RTC Year Register
R/W
3
RTC_CEN
RTC_ASEC
RTC Century Register
R/W
RTC Alarm Seconds Register
R/W
PS013015-0316
Register Map
ZILOG [ ZILOG, INC. ]
