eZ80L92 MCU
Product Specification
174
Table 96. ZDI Read/Write Control Register Functions (ZDI_RW_CTL = 16h in
the ZDI Register Write-Only Address Space)
Hex
Hex
Value
Command
Value
Command
00
01
02
03
04
05
Read {MBASE, A, F}
ZDI_RD_U ← MBASE
ZDI_RD_H ← F
80
81
82
83
84
85
Write {MBASE, A, F}
MBASE ← ZDI_WR_U
F ← ZDI_WR_H
ZDI_RD_L ← A
A ← ZDI_WR_L
Read BC
Write BC
ZDI_RD_U ← BCU
ZDI_RD_H ← B
ZDI_RD_L ← C
BCU ← ZDI_WR_U
B ← ZDI_WR_H
C ← ZDI_WR_L
Read DE
Write DE
ZDI_RD_U ← DEU
ZDI_RD_H ← D
ZDI_RD_L ← E
DEU ← ZDI_WR_U
D ← ZDI_WR_H
E ← ZDI_WR_L
Read HL
Write HL
ZDI_RD_U ← HLU
ZDI_RD_H ← H
ZDI_RD_L ← L
HLU ← ZDI_WR_U
H ← ZDI_WR_H
L ← ZDI_WR_L
Read IX
Write IX
ZDI_RD_U ← IXU
ZDI_RD_H ← IXH
ZDI_RD_L ← IXL
IXU ← ZDI_WR_U
IXH ← ZDI_WR_H
IXL ← ZDI_WR_L
Read IY
Write IY
ZDI_RD_U ← IYU
ZDI_RD_H ← IYH
ZDI_RD_L ← IYL
IYU ← ZDI_WR_U
IYH ← ZDI_WR_H
IYL ← ZDI_WR_L
06
07
Read SP
In ADL mode, SP = SPL.
In Z80 mode, SP = SPS.
86
87
Write SP
In ADL mode, SP = SPL.
In Z80 mode, SP = SPS.
Read PC
Write PC
ZDI_RD_U ← PC[23:16]
ZDI_RD_H ← PC[15:8]
ZDI_RD_L ← PC[7:0]
PC[23:16] ← ZDI_WR_U
PC[15:8] ← ZDI_WR_H
PC[7:0] ← ZDI_WR_L
08
Set ADL
88
Reserved
ADL ← 1
Note: The eZ80 CPU’s alternate register set (A’, F’, B’, C’, D’, E’, HL’) cannot be read directly.
The ZDI programmer must execute the exchange instruction (EXX) to gain access to the
alternate eZ80 CPU register set.
PS013015-0316
Zilog Debug Interface