P10C68/P11C68
VCC
5.0V
3.3V
t
AUTO RECALL
STORE INHIBIT
Figure 8. Automatic RECALL and STORE inhibit.
NON-VOLATILE MEMORY OPERATION OF P10C68
MODE SELECTION
E
H
L
L
L
L
L
L
G
X
L
NE
X
H
H
L
Mode
Power
Standby
W
X
H
L
Not selected
Read RAM
Write RAM
Active
Active
Active
X
L
Non-volatile recall (Note 15)
Non-volatile store
H
L
H
L
L
I
CC2
L
No operation
Active
L
H
X
H
NOTE
15.
An automatic RECALL also takes place on chip power-up, starting when Vcc exceeds 3.3V, and taking t
from the
RECALL
time at which Vcc exceeds 3.3V. Vcc must not drop below 3.3V once it has exceeded it for the RECALL to function
properly.
STORE CYCLE 1 : W (BAR) CONTROLLED (See note 16)
P10C68-35
Max.
10
0
0
45
0
P10C68-45
Symbol
Units
Notes
17
Parameter
Min.
Max.
10
Alternative
Min.
Standard
ms
ns
ns
ns
ns
Store cycle time
t
t
t
t
t
WLQX
STORE
Output disable set-up to NE (bar) fall
Non-volatile set-up to write low
Write low to NE (bar) rise
Chip enable SET-UP
0
0
45
0
GHNL
NLWL
WLNH
18
t
WC
t
ELWL
8
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