P10C68/P11C68
Industrial temperature range
Test conditions (unless otherwise stated):
Tamb = -40˚C to 70˚C, Vcc = +5V ꢀ 10% (See notes 4, 5 and 6)
Value
Characteristic
Symbol
Units
Conditions
Min.
Max.
Average power supply
current
mA
mA
t
t
= 35ns
= 45ns
I
80
75
AVAV
AVAV
CC1
Average power supply current
during STORE cycle
mA
All inputs at V ≤ 0.2V
IN
I
50
CC2
Average power supply current
(standby, cycling TTL input levels)
mA
mA
t
t
= 35ns
= 45ns
I
27
23
AVAV
AVAV
SB1
E(bar) ≥V , all other inputs
IH
cycling
Average power supply current
(standby, stable CMOS input levels)
mA
E (bar)≥(V
-0.2V), all other
CC
I
1
SB2
inputs at V ≤0.2V or ≥(V
-
IN
CC
0.2V)
Input leakage current (any input)
Off state output leakage current
Output logic '1' voltage
Output voltage '0' voltage
µA
µA
V
V
V
I
= max, V = V to V
IN SS
I
ꢀ1
ꢀ5
CC
CC
OUT
OUT
CC
CC
ILK
= max, V = V to V
I
IN
SS
OLK
= 4mA
= 8mA
V
V
2.4
OH
OL
V
I
0.4
NOTES
4.
I
is dependent on output loading and cycle rate. The specified values are obtained with outputs unloaded.
CC1
5.
Bringing E (bar) ≥ V will not produce standby currents levels until any non-volatile cycle in progress has timed out. See
IH
Mode Selection table.
6.
I
is the average current required for the duration of the STORE cycle (t
) after the sequence that initiates the
CC2
STORE
cycle.
AC TEST CONDITIONS
Input pulse levels
V
SS
to 3V
Input rise and fall times
Input and output timing reference levels
Output load
≤5ns
5.0V
1.5V
See Figure 3
480 Ohms
OUTPUT
CAPACITANCE T
= 25°C, f = 1.0MHz (see note 7)
amb
255
Ohms
30p
Conditions
Parameter
Symbol Max. Units
INCLUDING
SCOPE AND
FIXTURE
Input capacitance
Output capacitance
C
5
7
pF
pF
∆V=0 to 3V
∆V=0 to 3V
IN
C
OUT
NOTE
Figure 3. AC output loading.
7. These parameters are characterised but not 100% tested.
4
ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
