P10C68/P11C68
NON-VOLATILE MEMORY OPERATION OF P11C68
MODE SELECTION
E
H
L
W
X
H
L
A
12
-A (hex)
0
Mode
Not selected
I/O
Power
Standby
Active
Notes
X
Output High Z
Output data
Input Data
X
Read RAM
22
L
X
Write RAM
Active
L
H
0000
1555
0AAA
1FFF
10F0
0F0F
0000
1555
0AAA
1FFF
10F0
0F0E
Read RAM
Output Data
Output Data
Output Data
Output Data
Output Data
Output High Z
Output Data
Output Data
Output Data
Output Data
Output Data
Output High Z
Active
21, 22
21, 22
21, 22
21, 22
21, 22
20
Read RAM
Read RAM
Read RAM
Read RAM
Non-volatile STORE
Read RAM
I
CC2
L
H
Active
21, 22
21, 22
21, 22
21, 22
21, 22
21
Read RAM
Read RAM
Read RAM
Read RAM
Non-volatile RECALL
NOTES
21.
The six consecutive addresses must be in order listed - (0000, 1555, 0AAA, 1FFF, 10F0, 0F0F) for a STORE cycle or
(0000, 1555, 0AAA, 1FFF, 10F0, 0F0E) for a RECALL cycle. W (bar) must be high during all six consecutive cycles. See
STORE CYCLE and RECALL CYCLE tables and diagrams for further details.
22.
I/O state assumes that G (bar) ≥V . Activation of non-volatile cycles does not depend on the state of G (bar).
IL
STORE / RECALL CYCLES 1 AND 2 (See notes 24 and 29)
P11C68-45
P11C68-35
Max.
Symbol
Parameter
Units
Notes
Min.
Max.
Min.
Alternative
Standard
ns
ns
Read cycle time
Skew between sequentially
adjacent addresses
35
45
t
t
t
AVAV
AXAV
ACS
5
23
5
t
SKEW
75
10
20
ns
ms
µs
ns
ns
ns
25
26
26, 30
27
27
27
Address valid to output inactive
Store cycle time
Recall cycle time
Address set-up to chip enable
Chip enable pulse width
Chip disable to address change
75
10
20
t
t
AVQZ
ELQZ
t
t
STORE
RECALL
0
35
0
0
45
0
t
t
AVEL
ELEH
AE
t
t
t
EP
t
EHAX
EA
NOTES
23.
Skew spec may be avoided by using E (bar) (STORE/RECALL CYCLE 2).
24.
W (bar) ≥V during entire address sequence to initiate a non-volatile cycle.
IH
Required address sequences are shown in the Mode Selection table.
25.
26.
Once the software STORE or RECALL cycle is initiated, it completes automatically, ignoring all inputs.
Measured with W (bar) high, G (bar) low and E (bar) low. Note that STORE cycles (but not RECALLS) are aborted by Vcc
< 3.3V (STORE Inhibit).
27.
28.
29.
E (bar) must make the transition between V (max) to V (max), or V (max) to V (min) in a monotonic fashion.
Chip is continuously selected with E (bar) low.
IH
IL
IL
IH
Addresses 1 through 6 are found in the Mode Selection table. Address 6 determines whether the P11C68 performs a
STORE or RECALL. A RECALL cycle is performed automatically at power up when V exceeds 3.3V. V must not drop
CC
CC
below 3.3V once it has exceeded it for the RECALL to function properly, t
exceeds 3.3V.
is measured from the point at which V
RECALL
CC
30.
Address transitions may not occur on any address pin during this time.
12
ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
