Le77D11
Data Sheet
where 2 • R
F
is the total resistance of the external fuse resistors in the circuit, R
IMT
is the impedance setting resistor, K
OUT
is the
gain from V
OUT
to V
AB
, and K
V
is the voice current gain defined in the Transmission Specifications Table. Note that the equation
reveals that Z
2WIN
is a function of the selectable resistors, R
IMT
and R
F
. For example, if R
F
= 0
Ω
and R
IMT
is 100 k, the terminating
impedance is 600
Ω.
This is the configuration used in this data sheet for defining the device specifications. However, in a real
application, R
F
= 50
Ω
is recommended, producing a total input impedance of 700
Ω
which is a good starting point for meeting
worldwide requirements using the programmable filters of the Le78D11 VoSLAC device.
Two-Wire to Four-Wire Gain (G
24
)
The two-wire to four-wire gain is the gain from the phone line to the VOUT output of the Le77D11 VoSLIC device. To solve for
G
24
, the VIN pin is grounded (see
V
OUT
1
-------------
=
G
24
= -----------------------------------------
-
V
AB
2R
F
------------------- +
K
OUT
-
K
V
R
IMT
or
2R
F
G
24
= –
20 log
K
OUT
+ -------------------
in dB
-
K R
V
IMT
Using the values of R
IMT
and R
F
from the application example, G
24
for this circuit is –10.9 dB.
Four-Wire to Two-Wire Gain (G
42
)
G
42
is the gain from the VIN input to the line. This gain is defined as V
AB
/V
IN
.
V
AB
--------- = G
42
-
V
IN
R
L
-
K
IN
-----------------------
R
L
+ 2R
F
=
--------------------------------------------------
1
+
K
OUT
R
IMT
K
V
----------------------------------
-
R
L
+
2R
F
or
R
L
-
K
IN
-----------------------
R
L
+ 2R
F
-
= –
20 log
-------------------------------------------------- in dB
K
OUT
R
IMT
K
V
1
+ ----------------------------------
-
R
L
+
2R
F
G
42
where K
IN
is the gain from VIN to V
AB
. Using the values of R
IMT
and R
F
from the application example and R
L
= 600
Ω,
G
42
for
this circuit is 7.3 dB.
Note:
Equation derivations can be found in the
Zarlink
Le77D11/Le78D11 Chip Set User’s Guide (document ID# 080716).
Figure 7.
Transmission Block Diagram
R
F
*
A
i
R
S
CFILT
i
VHP
i
VOUT
i
VIN
i
Sense
V
AB
K
out
K
in
R
L
*
I
L
K
v
C
HPi
*
R
IMTi
*
R
S
R
F
*
Note:
* denotes external components
B
i
8
Zarlink Semiconductor Inc.
ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
