Le77D11
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Stresses above those listed under Absolute Maximum Ratings can cause permanent device failure. Functionality at or above
these limits is not implied. Exposure to absolute maximum ratings for extended periods can affect device reliability.
Storage temperature
Ambient temperature, under bias
VCC with respect to AGND
–55 to +150°C
-40° to 85°C
–0.4 to +6.5 V
V
REG with respect to BGND
+0.4 to –115 V
–100 to 100 mV
BGND with respect to AGND
A (Tip) or B (Ring) to BGND:
Continuous
VREG –1 to BGND +1
V
V
V
REG –5 to BGND +5
REG –10 to BGND +10
REG –15 to BGND +15
10 ms (F = 0.1 Hz)
1 µs (F = 0.1 Hz)
250 ns (F = 0.1 Hz)
Current from A (Tip) or B (Ring)
C1, C2, C3 to AGND
CHCLK
±150 mA
–0.4 to VCC + 0.4 V
AGND to VCC
BGND to +44 V
VSW
VREF
AGND to VCC
Maximum power dissipation,
TA = 85° C (See notes)
1.8 W
θJA
32° C/W
θJC
9.2° C/W
JESD22 Class 1C compliant
Thermal Data:
In 44-pin eTQFP package
Thermal Data:
In 44-pin eTQFP package
ESD Immunity (Human Body Model)
Notes:
Thermal limiting circuitry on chip will shut down the circuit at a junction temperature of about 165ºC. Continuous operation above 145ºC junction
temperature may degrade device reliability.
The thermal performance of a thermally enhanced package is assured through optimized printed circuit board layout. Specified performance re-
quires that the exposed thermal pad be soldered to an equally sized exposed copper surface, which, in turn, conducts heat through 16 0.3 mm
diameter vias on a 1.27 mm pitch to a large (> 500 mm2) internal copper plane. (Refer to Zarlink application note Layout Considerations for the
Le77D112 and Le9502 Devices, document ID# 081013).
Package Assembly
The green package devices are assembled with enhanced environmental compatible lead (Pb), halogen, and antimony-free
materials. The leads possess a matte-tin plating which is compatible with conventional board assembly processes or newer lead-
free board assembly processes. The peak soldering temperature should not exceed 245°C during printed circuit board assembly.
The standard (non-green) package devices are assembled with industry-standard mold compounds, and the leads possess a tin/
lead (Sn/Pb) plating. These packages are compatible with conventional SnPb eutectic solder board assembly processes. The
peak soldering temperature should not exceed 225°C during printed circuit board assembly.
Refer to IPC/JEDEC J-Std-020B Table 5-2 for the recommended solder reflow temperature profile.
OPERATING RANGES
Zarlink guarantees the performance of this device over commercial (0° to 70°C) and industrial (−40° to 85°C)
temperature ranges by conducting electrical characterization over each range, and by conducting a production test
with single insertion coupled to periodic sampling. These characterization and test procedures comply with section
4.6.2 of Bellcore GR-357-CORE Component Reliability Assurance Requirements for Telecommunications Equipment.
Environmental Ranges
Ambient Temperature
-40° to 85°C
Electrical Ranges
VCC
VSW
3.3 V ± 5%
8 to 40 V
VREF
VREG
1.40 V ± 50 mV
–7 to –110 V (0 V in Disconnect state)
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Zarlink Semiconductor Inc.
ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
