欢迎访问ic37.com |
会员登录 免费注册
发布采购

GP2021/IG/GQ1Q 参数 Datasheet PDF下载

GP2021/IG/GQ1Q图片预览
型号: GP2021/IG/GQ1Q
PDF下载: 下载PDF文件 查看货源
内容描述: [Correlator, 16-Bit, CMOS, PQFP80, 14 X 14 MM, 2 MM HEIGHT, MS-022BC, MQFP-80]
分类和应用: 时钟外围集成电路
文件页数/大小: 63 页 / 511 K
品牌: ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
 浏览型号GP2021/IG/GQ1Q的Datasheet PDF文件第33页浏览型号GP2021/IG/GQ1Q的Datasheet PDF文件第34页浏览型号GP2021/IG/GQ1Q的Datasheet PDF文件第35页浏览型号GP2021/IG/GQ1Q的Datasheet PDF文件第36页浏览型号GP2021/IG/GQ1Q的Datasheet PDF文件第38页浏览型号GP2021/IG/GQ1Q的Datasheet PDF文件第39页浏览型号GP2021/IG/GQ1Q的Datasheet PDF文件第40页浏览型号GP2021/IG/GQ1Q的Datasheet PDF文件第41页  
GP2021  
SOURCESEL, bit 10: Selects which input source to be  
used by the channel when in Real_lnput mode. Low selects  
SIGN0 and MAG0, high selects SIGN1 and MAG1.  
After a master reset (NRESET low), GPS mode is selected,  
but with all zeros in the G2 generator, the G1 code is seen  
at the output of the C/A code generator.  
MEAS_STATUS_A (Read address)  
CODE_OFF/ONB, bit 11: When low, the code is output  
normally, but when high, the Prompt, Early and Late codes  
are held high (code mixer outputs exactly follow inputs)  
and the Early-minus-late code is held low. This is intended  
for test purposes only.  
Bit  
Bit name  
15 to 14 Not used  
13  
12  
11  
10  
9
8
7
6
5
4
3
2
1
TIC  
MEAS_INT  
CH11_MISSED_MEAS_DATA  
CH10_MISSED_MEAS_DATA  
CH9_MISSED_MEAS_DATA  
CH8_MISSED_MEAS_DATA  
CH7_MISSED_MEAS_DATA  
CH6_MISSED_MEAS_DATA  
CH5_MISSED_MEAS_DATA  
CH4_MISSED_MEAS_DATA  
CH3_MISSED_MEAS_DATA  
CH2_MISSED_MEAS_DATA  
CH1_MISSED_MEAS_DATA  
CH0_MISSED_MEAS_DATA  
Table 20  
PRESET/UPDATEB, bit 12: When high sets the channel  
into Preset mode, or when low, sets the channel into Update  
mode. This bit is cleared to low after the Preset function  
has been performed, that is, after the first TIC following  
the loading of the Epoch counters.  
TRACK_SEL (1 and 0), bits 14 and 13: Select the  
appropriate code to be produced by the Tracking arm  
output of the code generator as shown in Table 19.  
Bit  
Code select  
0
14  
13  
0
0
1
1
0
1
0
1
Early code  
Late code  
Dithering code (alternating early and late)  
Early-minus-late code  
CHx_MISSED_MEAS_DATA status bit, when high,  
indicates that one or more sets of measurement data have  
been missed since the last read from this register. It is set  
high by a read from the Code Phase Counter of the same  
channel, when the previous value in the Code Phase  
Counter has not been read, and is reset by a read from  
the MEAS_STATUS_A register or by disabling the channel.  
Table 19 TRACK_SEL bit settings for Tracking arm  
code selection  
When the dithering code has been selected, the Tracking  
arm will use the Early code for 20 periods of the Gold code,  
the Late code for the next 20 periods and then this process  
of alternating between Early and Late code will be repeated  
indefinitely. The Tracking Arm will toggle between Early or  
Late codes on every increment of a 20ms Epoch Count.  
Its state can be determined by reading the  
ACCUM_STATUS_C register.  
If this register is always read after the Code Phase Counter,  
it indicates whether measurement data has been missed  
before the last read of the Code Phase Counter. All  
CHx_MISSED_MEAS_DATA bits are set low by a  
hardware (NRESET) or software (MRB reset.  
The output code is a sequence of 11s and 21s for all  
code types except EARLY-MINUS-LATE where the result  
can also be a 0. In EARLY-MINUS-LATE mode the values  
are not the 12, 0, 22 that result from the calculation (11  
or 21) 2 (11 or 21), but are halved to 11, 0, 21. This  
must be considered when choosing thresholds in the  
software as the correlation results will be exactly half the  
values otherwise expected.  
The MEAS_INT bitis set high at each TIC and 50ms before  
each TIC (ifTIC period is greater then 50ms), and is cleared  
by reading this register. This bit is used as a flag to the  
microprocessor to time software module swapping and is  
reset by a hardware master reset (NRESET low) but not  
by an MRB software reset.  
The TIC bit is set high at every TIC and is cleared by  
reading this register. The purpose of the bit is to tell the  
microprocessor that new Measurement Data is available.  
This bit is reset by a hardware master reset (NRESET at  
low) but not by an MRB in RESET_CONTROL.  
GPS_NGLON, bit 15: Setting this bit to low changes the  
C/A code generator mode to GLONASS mode, to generate  
the fixed 511-bit sequence used by all GLONASS satellites.  
37  
 复制成功!