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XQ4013E-3BG191N 参数 Datasheet PDF下载

XQ4013E-3BG191N图片预览
型号: XQ4013E-3BG191N
PDF下载: 下载PDF文件 查看货源
内容描述: QPRO XQ4000E / EX QML高可靠性的FPGA [QPRO XQ4000E/EX QML High-Reliability FPGAs]
分类和应用:
文件页数/大小: 36 页 / 300 K
品牌: XILINX [ XILINX, INC ]
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R
QPRO XQ4000E/EX QML High-Reliability FPGAs  
XQ4000E CLB Switching Characteristic Guidelines  
Testing of switching parameters is modeled after testing  
methods specified by MIL-M-38510/605. All devices are  
100% functionally tested. Internal timing parameters are  
derived from measuring internal test patterns. Listed below  
are representative values. For more specific, more precise,  
and worst-case guaranteed data, use the values reported  
by the static timing analyzer (TRCE in the Xilinx Develop-  
ment System) and back-annotated to the simulation netlist.  
These path delays, provided as a guideline, have been  
extracted from the static timing analyzer report. All timing  
parameters assume worst-case operating conditions (sup-  
ply voltage and junction temperature). Values apply to all  
XQ4000E devices unless otherwise noted.  
-3  
-4  
Symbol  
Description  
Min  
Max  
Min  
Max  
Units  
Combinatorial Delays  
T
F/G inputs to X/Y outputs  
-
-
-
-
-
2.01  
4.3  
3.3  
3.6  
3.6  
-
-
-
-
-
2.7  
4.7  
4.1  
3.7  
4.5  
ns  
ns  
ns  
ns  
ns  
ILO  
T
F/G inputs via H to X/Y outputs  
C inputs via SR through H to X/Y outputs  
C inputs via H to X/Y outputs  
IHO  
T
T
T
HH0O  
HH1O  
HH2O  
C inputs via D through H to X/Y outputs  
IN  
CLB Fast Carry Logic  
Operand inputs (F1, F2, G1, G4) to C  
T
-
-
-
-
-
2.6  
4.4  
1.7  
3.3  
0.7  
-
-
-
-
-
3.2  
5.5  
1.7  
3.8  
1.0  
ns  
ns  
ns  
ns  
ns  
OPCY  
OUT  
T
Add/Subtract input (F3) to C  
OUT  
ASCY  
T
Initialization inputs (F1, F3) to C  
OUT  
INCY  
T
C
C
through function generators to X/Y outputs  
SUM  
IN  
IN  
T
to C  
, bypass function generators  
OUT  
BYP  
Sequential Delays  
Clock K to outputs Q  
Setup Time before Clock K  
T
-
2.8  
-
3.7  
ns  
CKO  
T
F/G inputs  
3.0  
4.6  
3.6  
4.1  
3.8  
2.4  
3.0  
4.0  
2.1  
3.5  
-
-
-
-
-
-
-
-
-
-
4.0  
6.1  
4.5  
5.0  
4.8  
3.0  
4.0  
4.2  
2.5  
4.2  
-
-
-
-
-
-
-
-
-
-
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ICK  
T
F/G inputs via H  
IHCK  
T
T
T
C inputs via H0 through H  
C inputs via H1 through H  
C inputs via H2 through H  
HH0CK  
HH1CK  
HH2CK  
T
C inputs via D  
IN  
DICK  
T
C inputs via EC  
ECCK  
T
C inputs via S/R, going Low (inactive)  
RCK  
CCK  
T
C
C
input via F/G  
IN  
IN  
T
input via F/G and H  
CHCK  
DS021 (v2.2) June 25, 2000  
www.xilinx.com  
7
Product Specification  
1-800-255-7778  
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