R
QPRO XQ4000E/EX QML High-Reliability FPGAs
XQ4000E Recommended Operating Conditions(1,2)
Symbol
Description
Min
4.5
4.5
2.0
70%
0
Max
5.5
Units
V
Supply voltage relative to GND, T = –55°C to +125°C Plastic
V
V
V
CC
J
Supply voltage relative to GND, T = –55°C to +125°C Ceramic
5.5
C
V
V
High-Level Input Voltage
Low-Level Input Voltage
Input signal transition time
TTL inputs
V
CC
IH
IL
CMOS inputs
TTL inputs
100%
0.8
V
CC
V
CMOS inputs
0
20%
250
V
CC
T
-
ns
IN
Notes:
1. At junction temperatures above those listed as Operating Conditions, all delay parameters increase by 0.35% per °C.
2. Input and output measurement threshold are 1.5V for TTL and 2.5V for CMOS.
XQ4000E DC Characteristics Over Recommended Operating Conditions
Symbol
Description
High-level output voltage @ I = –4.0 mA, V min
Min
Max
-
Units
V
V
TTL outputs
2.4
OH
OH
CC
High-level output voltage @ I = –1.0 mA, V min
CMOS outputs
TTL outputs
V – 0.5
CC
-
V
OH
CC
(1)
V
Low-level output voltage @ I = 12.0 mA, V min
-
0.4
0.4
50
V
OL
OL
CC
CMOS outputs
-
-
V
(2)
I
Quiescent FPGA supply current
Input or output leakage current
mA
µA
pF
mA
mA
CCO
I
–10
-
+10
16
L
C
Input capacitance (sample tested)
Pad pull-up (when selected) at V = 0V (sample tested)
IN
(3)
(3)
I
–0.02
0.2
–0.25
2.5
RIN
RLL
IN
I
Horizontal longline pull-up (when selected) at logic Low
Notes:
1. With 50% of the outputs simultaneously sinking 12 mA, up to a maximum of 64 pins.
2. With no output current loads, no active input or Longline pull-up resistors, all package pins at V or GND, and the FPGA configured
CC
with the development system Tie option.
3. Characterized Only.
DS021 (v2.2) June 25, 2000
www.xilinx.com
3
Product Specification
1-800-255-7778
XILINX [ XILINX, INC ]
