Artix-7 FPGAs Data Sheet: DC and AC Switching Characteristics
Speed Grade
Table 26: IO_FIFO Switching Characteristics
Symbol
Description
1.0V
0.95V
-1LI
0.9V
-2LE
Units
-3
-2/-2LE
-1
-1Q/-1M
IO_FIFO Clock to Out Delays
TOFFCKO_DO
TCKO_FLAGS
Setup/Hold
RDCLK to Q outputs
0.55
0.55
0.60
0.61
0.68
0.77
0.68
0.77
0.68
0.77
0.81
0.79
ns
ns
Clock to IO_FIFO flags
T
CCK_D/TCKC_D
D inputs to WRCLK
WREN to WRCLK
0.47/0.02 0.51/0.02 0.58/0.02 0.58/0.18 0.58/0.02 0.76/0.09
0.42/–0.01 0.47/–0.01 0.53/–0.01 0.53/–0.01 0.53/–0.01 0.70/–0.05
ns
ns
TIFFCCK_WREN
TIFFCKC_WREN
/
TOFFCCK_RDEN
/
RDEN to RDCLK
0.53/0.02 0.58/0.02 0.66/0.02 0.66/0.02 0.66/0.02 0.79/–0.02
ns
TOFFCKC_RDEN
Minimum Pulse Width
TPWH_IO_FIFO RESET, RDCLK, WRCLK
TPWL_IO_FIFO RESET, RDCLK, WRCLK
Maximum Frequency
1.62
1.62
2.15
2.15
2.15
2.15
2.15
2.15
2.15
2.15
2.15
2.15
ns
ns
FMAX
RDCLK and WRCLK
266.67
200.00
200.00
200.00
200.00
200.00
MHz
DS181 (v1.25) June 18, 2018
www.xilinx.com
Product Specification
27
XILINX [ XILINX, INC ]
