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DS635 参数 Datasheet PDF下载

DS635图片预览
型号: DS635
PDF下载: 下载PDF文件 查看货源
内容描述: 了XA Spartan -3E汽车FPGA系列数据手册 [XA Spartan-3E Automotive FPGA Family Data Sheet]
分类和应用:
文件页数/大小: 37 页 / 723 K
品牌: XILINX [ XILINX, INC ]
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Table 18: Output Timing Adjustments for IOB (Continued)  
Table 18: Output Timing Adjustments for IOB  
Add the  
Add the  
Adjustment  
Below  
Convert Output Time from  
LVCMOS25 with 12mA Drive and  
Fast Slew Rate to the Following  
Signal Standard (IOSTANDARD)  
Adjustment  
Below  
Convert Output Time from  
LVCMOS25 with 12mA Drive and  
Fast Slew Rate to the Following  
Signal Standard (IOSTANDARD)  
-4 Speed  
Grade  
-4 Speed  
Grade  
Units  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Units  
LVCMOS18  
Slow  
2 mA  
4 mA  
6 mA  
8 mA  
2 mA  
4 mA  
6 mA  
8 mA  
2 mA  
4 mA  
6 mA  
2 mA  
4 mA  
6 mA  
2 mA  
2 mA  
5.24  
3.21  
2.49  
1.90  
4.15  
2.13  
1.14  
0.75  
4.68  
3.97  
3.11  
3.38  
2.70  
1.53  
6.63  
4.44  
0.34  
0.55  
0.46  
0.25  
–0.20  
Single-Ended Standards  
LVTTL  
Slow  
Fast  
Slow  
Fast  
2 mA  
4 mA  
6 mA  
8 mA  
12 mA  
16 mA  
2 mA  
4 mA  
6 mA  
8 mA  
12 mA  
16 mA  
2 mA  
4 mA  
6 mA  
8 mA  
12 mA  
16 mA  
2 mA  
4 mA  
6 mA  
8 mA  
12 mA  
16 mA  
2 mA  
4 mA  
6 mA  
8 mA  
12 mA  
2 mA  
4 mA  
6 mA  
8 mA  
12 mA  
5.41  
2.41  
1.90  
0.67  
0.70  
0.43  
5.00  
1.96  
1.45  
0.34  
0.30  
0.30  
5.29  
1.89  
1.04  
0.69  
0.42  
0.43  
4.87  
1.52  
0.39  
0.34  
0.30  
0.30  
4.21  
2.26  
1.52  
1.08  
0.68  
3.67  
1.72  
0.46  
0.21  
0
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Fast  
LVCMOS15  
LVCMOS12  
Slow  
Fast  
LVCMOS33  
Slow  
Fast  
HSTL_I_18  
HSTL_III_18  
PCI33_3  
SSTL18_I  
SSTL2_I  
Differential Standards  
LVDS_25  
–0.55  
0.04  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
BLVDS_25  
MINI_LVDS_25  
LVPECL_25  
–0.56  
Input Only  
–0.48  
0.42  
LVCMOS25  
Slow  
Fast  
RSDS_25  
DIFF_HSTL_I_18  
DIFF_HSTL_III_18  
DIFF_SSTL18_I  
DIFF_SSTL2_I  
0.55  
0.40  
0.44  
Notes:  
1. The numbers in this table are tested using the methodology  
presented in Table 19 and are based on the operating conditions  
set forth in Table 6, Table 9, and Table 11.  
2. These adjustments are used to convert output- and  
three-state-path times originally specified for the LVCMOS25  
standard with 12 mA drive and Fast slew rate to times that  
correspond to other signal standards. Do not adjust times that  
measure when outputs go into a high-impedance state.  
DS635 (v2.0) September 9, 2009  
www.xilinx.com  
Product Specification  
18  
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